Patents by Inventor Charles Clayton
Charles Clayton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180061408Abstract: An automated assistant automatically recognizes speech, decode paraphrases in the recognized speech, performs an action or task based on the decoder output, and provides a response to the user. The response may be text or audio, and may be translated to include paraphrasing. The automatically recognized speech may be processed to determine partitions in the speech, which may be in turn processed to identify paraphrases in the partitions. A decoder may process an input utterance text to identify paraphrases content to include in a segment or sentence. The decoder may paraphrase the input utterance to make the utterance, updated with one or more paraphrases, more easily parsed by a parser. A translator may process a generated response to make the response sound more natural. The translator may replace content of the generated response with paraphrase content based on the state of the conversation with the user, including salience data.Type: ApplicationFiled: August 4, 2017Publication date: March 1, 2018Applicant: Semantic Machines, Inc.Inventors: Jacob Daniel Andreas, David Ernesto Heekin Burkett, Pengyu Chen, Jordan Rian Cohen, Gregory Christopher Durrett, Laurence Steven Gillick, David Leo Wright Hall, Daniel Klein, Adam David Pauls, Daniel Lawrence Roth, Jesse Daniele Eskes Rusak, Yan Virin, Charles Clayton Wooters
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Publication number: 20170357456Abstract: Representative embodiments disclose how to remove spilled data from an unauthorized system and/or service in a cloud service. Some embodiments allow a user to remove spilled data in a secure fashion without involving an administrator. Spilled data resides in a data structure backed by allocated storage locations. The system presents a user interface allowing a user to enter information that allows identification of the allocated storage locations. The spilled data is removed from the data structure leaving whitespace in the allocated storage locations where remnants of the spilled data can reside. The system creates a copy of the data structure, removing the whitespace. The system connects the copy of the data structure in place of the original data structure. The original allocated storage locations are then overwritten in a secure manner to remove any remnants of the spilled data.Type: ApplicationFiled: June 14, 2016Publication date: December 14, 2017Inventors: Geoffrey Naismith DeFilippi, Joel D. Tipke, Michael Ernest Bailey, Charles Clayton Gardner, Grant D. Goodall
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Publication number: 20170345894Abstract: An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first conductivity type over the substrate, implanting dopants of the first conductivity type into the lower epitaxial layer in an area for a shallow component and blocking the dopants from an area for a deep component, forming a lightly doped upper epitaxial layer over the lower epitaxial layer and activating the implanted dopants to form a heavily doped region. The shallow component is formed over the heavily doped region, and the deep component is formed outside the heavily doped region, extending through the upper epitaxial layer into the lower epitaxial layer.Type: ApplicationFiled: August 18, 2017Publication date: November 30, 2017Inventors: James Fred Salzman, Charles Clayton Hadsell
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Patent number: 9783868Abstract: A dross processing system crucible comprising a substantially vertical inner wall having an upper end, a lower end, an outer surface, and an inner surface, a bottom having an upper surface and a lower surface, the upper surface affixed to the lower end of the inner wall. A blockable port is disposed in the bottom, and a thermal insulating material covers the outer surface of the vertical inner wall and the lower surface of the bottom. An outer vessel is affixed to the upper end of the substantially vertical inner wall, and the thermal insulating material is disposed between the outer surface of the inner wall and the outer vessel.Type: GrantFiled: February 19, 2015Date of Patent: October 10, 2017Inventor: Charles Clayton Wycuff
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Patent number: 9741791Abstract: An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first conductivity type over the substrate, implanting dopants of the first conductivity type into the lower epitaxial layer in an area for a shallow component and blocking the dopants from an area for a deep component, forming a lightly doped upper epitaxial layer over the lower epitaxial layer and activating the implanted dopants to form a heavily doped region. The shallow component is formed over the heavily doped region, and the deep component is formed outside the heavily doped region, extending through the upper epitaxial layer into the lower epitaxial layer.Type: GrantFiled: March 7, 2016Date of Patent: August 22, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: James Fred Salzman, Charles Clayton Hadsell
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Publication number: 20170140125Abstract: Systems and methods for monitoring accurate, real-time medicament device events, performing analytics on that data, and providing notifications are described. In various embodiments, an application server receives controller medication events, analyzes the events, associated event times, and controller medication dosage plans to characterize event times and send notifications for future doses. The controller medication dosage plan may specify a dose time for a planned dose, a narrow time window comprising the dose time, and an expanded time window comprising the narrow time window and longer in duration than the narrow time window, and the events may be characterized based on their time relative to the dose time, the time windows, and other events.Type: ApplicationFiled: November 14, 2016Publication date: May 18, 2017Inventors: Christopher Hogg, Gregory F. Tracy, John David Van Sickle, Dmitry Stupakov, Ki Hong Han, Mike Lohmeier, John Kalmi, Leah Morrell, Charles Clayton Donaldson
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Publication number: 20160190237Abstract: An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first conductivity type over the substrate, implanting dopants of the first conductivity type into the lower epitaxial layer in an area for a shallow component and blocking the dopants from an area for a deep component, forming a lightly doped upper epitaxial layer over the lower epitaxial layer and activating the implanted dopants to form a heavily doped region. The shallow component is formed over the heavily doped region, and the deep component is formed outside the heavily doped region, extending through the upper epitaxial layer into the lower epitaxial layer.Type: ApplicationFiled: March 7, 2016Publication date: June 30, 2016Inventors: James Fred Salzman, Charles Clayton Hadsell
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Patent number: 9281245Abstract: An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first conductivity type over the substrate, implanting dopants of the first conductivity type into the lower epitaxial layer in an area for a shallow component and blocking the dopants from an area for a deep component, forming a lightly doped upper epitaxial layer over the lower epitaxial layer and activating the implanted dopants to form a heavily doped region. The shallow component is formed over the heavily doped region, and the deep component is formed outside the heavily doped region, extending through the upper epitaxial layer into the lower epitaxial layer.Type: GrantFiled: December 10, 2013Date of Patent: March 8, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: James Fred Salzman, Charles Clayton Hadsell
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Publication number: 20150159238Abstract: A dross processing system crucible comprising a substantially vertical inner wall having an upper end, a lower end, an outer surface, and an inner surface, a bottom having an upper surface and a lower surface, the upper surface affixed to the lower end of the inner wall. A blockable port is disposed in the bottom, and a thermal insulating material covers the outer surface of the vertical inner wall and the lower surface of the bottom. An outer vessel is affixed to the upper end of the substantially vertical inner wall, and the thermal insulating material is disposed between the outer surface of the inner wall and the outer vessel.Type: ApplicationFiled: February 19, 2015Publication date: June 11, 2015Inventor: Charles Clayton WYCUFF
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Publication number: 20140245864Abstract: A dross processing system crucible comprising a substantially vertical inner wall having an upper end, a lower end, an outer surface, and an inner surface, a bottom having an upper surface and a lower surface, the upper surface affixed to the lower end of the inner wall. A blockable port is disposed in the bottom, and a thermal insulating material covers the outer surface of the vertical inner wall and the lower surface of the bottom. An outer vessel is affixed to the upper end of the substantially vertical inner wall, and the thermal insulating material is disposed between the outer surface of the inner wall and the outer vessel.Type: ApplicationFiled: March 4, 2013Publication date: September 4, 2014Inventor: Charles Clayton WYCUFF
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Publication number: 20140183707Abstract: An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first conductivity type over the substrate, implanting dopants of the first conductivity type into the lower epitaxial layer in an area for a shallow component and blocking the dopants from an area for a deep component, forming a lightly doped upper epitaxial layer over the lower epitaxial layer and activating the implanted dopants to form a heavily doped region. The shallow component is formed over the heavily doped region, and the deep component is formed outside the heavily doped region, extending through the upper epitaxial layer into the lower epitaxial layer.Type: ApplicationFiled: December 10, 2013Publication date: July 3, 2014Inventors: James Fred SALZMAN, Charles Clayton HADSELL
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Publication number: 20130126508Abstract: A method of increasing the operating life of a semiconductor device that is to be used in a harsh ionizing radiation environment including determining heating criteria for annealing the device; installing the device in an electronic apparatus; and heating the installed device with a local heating source in accordance with the heating criteria.Type: ApplicationFiled: December 1, 2011Publication date: May 23, 2013Applicant: Texas Instruments IncorporatedInventors: James Fred Salzman, Charles Clayton Hadsell
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Patent number: 5874159Abstract: This invention relates to making nonwoven fabrics which are durable for machine washing and durable for other wet and hard use or abusive applications. The inventive fabrics comprise two layers of fabric sheet bonded together at closely spaced locations where the bonding includes fibers from both fabrics thoroughly involved with the binder. The inventive fabrics retain the qualities of a spunlaced nonwoven fabric which include low cost, comfort, drapability, softness, absorbency, breathability and others while having the durability comparable to traditional knitted or woven fabrics.Type: GrantFiled: May 3, 1996Date of Patent: February 23, 1999Assignee: E. I. du Pont de Nemours and CompanyInventors: Charles Clayton Cruise, Robert Howe Peterson, James Thomas Summers
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Patent number: 4413674Abstract: A transformer cooling structure characterized by a plurality of coolant fluid cooling panels extending outwardly from the transformer tank wall, and the panels being comprised of a pair of sheet-like sides formed to a corrugated configuration through which the fluid flows in heat exchange with ambient air.Type: GrantFiled: March 4, 1983Date of Patent: November 8, 1983Assignee: Westinghouse Electric Corp.Inventors: Randall N. Avery, Charles A. Clayton, Levon R. Floyd, Douglas B. Mackintosh, Willie A. Powell, Michael W. Atkins
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Patent number: 4085049Abstract: A skimming device for removing oil and similar products from the surface of water. The device is self-adjusting in that its skimming rate and the depth of skim are controlled by the rate that the skimmed fluid is removed from the device.Type: GrantFiled: May 4, 1976Date of Patent: April 18, 1978Inventors: Norman John Reid Hartwick, Donald Charles Clayton Lathe