Patents by Inventor Charles D. Binford
Charles D. Binford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9832270Abstract: A system and method for determining I/O performance headroom that accounts for a real-world workload is provided. In some embodiments, a computing device is provided that is operable to identify a data transaction received by a storage system and directed to a storage device. The computing system identifies an attribute of the data transaction relating to a performance cost of the data transaction and queries a performance profile to determine a benchmark performance level for the storage device. The computing system determines a benchmark performance level for the storage system based on the benchmark performance level for the storage device and compares a metric of the performance of the data transaction with the storage system benchmark performance level to determine remaining headroom of the storage system.Type: GrantFiled: November 11, 2014Date of Patent: November 28, 2017Assignee: NetApp, Inc.Inventors: Sai Rama Krishna Susarla, Charles D. Binford, Vishal Kumawat
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Patent number: 9830094Abstract: A system, method, and computer program product is described for providing dynamic enabling and/or disabling of protection information (PI) in array systems during operation. A storage system receives a request to transition a volume from PI disabled to PI enabled during regular operation. The storage system synchronizes and purges the cache associated with the target volume. The storage system initiates an immediate availability format (IAF-PI) process to initialize PI for the associated data blocks of the volume's storage devices. The storage system continues receiving I/O requests as the IAF-PI process sweeps through the storage devices. The storage system inserts and checks PI for the write data as it is written to the storage devices. The storage system inserts PI for requested data above the IAF-PI boundary and checks PI for requested data below the IAF-PI boundary. The transition remains an online process that avoids downtime.Type: GrantFiled: June 23, 2015Date of Patent: November 28, 2017Assignee: NetApp, Inc.Inventors: Mahmoud K. Jibbe, Charles D. Binford, Wei Sun
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Publication number: 20160378363Abstract: A system, method, and computer program product is described for providing dynamic enabling and/or disabling of protection information (PI) in array systems during operation. A storage system receives a request to transition a volume from PI disabled to PI enabled during regular operation. The storage system synchronizes and purges the cache associated with the target volume. The storage system initiates an immediate availability format (IAF-PI) process to initialize PI for the associated data blocks of the volume's storage devices. The storage system continues receiving I/O requests as the IAF-PI process sweeps through the storage devices. The storage system inserts and checks PI for the write data as it is written to the storage devices. The storage system inserts PI for requested data above the IAF-PI boundary and checks PI for requested data below the IAF-PI boundary. The transition remains an online process that avoids downtime.Type: ApplicationFiled: June 23, 2015Publication date: December 29, 2016Inventors: Mahmoud K. Jibbe, Charles D. Binford, Wei Sun
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Publication number: 20160134493Abstract: A system and method for determining I/O performance headroom that accounts for a real-world workload is provided. In some embodiments, a computing device is provided that is operable to identify a data transaction received by a storage system and directed to a storage device. The computing system identifies an attribute of the data transaction relating to a performance cost of the data transaction and queries a performance profile to determine a benchmark performance level for the storage device. The computing system determines a benchmark performance level for the storage system based on the benchmark performance level for the storage device and compares a metric of the performance of the data transaction with the storage system benchmark performance level to determine remaining headroom of the storage system.Type: ApplicationFiled: November 11, 2014Publication date: May 12, 2016Inventors: Sai Rama Krishna Susarla, Charles D. Binford, Vishal Kumawat
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Patent number: 8539109Abstract: A network communication system and method providing a communication protocol extension for direct memory access operations allowing the separation of the command and data paths. The identification of the communication path to a third-party device is provided to a direct-memory-access initiator allowing the passing of data directly to the third-party device.Type: GrantFiled: March 9, 2005Date of Patent: September 17, 2013Assignee: Oracle America, Inc.Inventors: Whay Sing Lee, Richard W. Meyer, Charles D. Binford, Rodney A. Dekoning, William Stronge
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Patent number: 8527661Abstract: A network system gateway and method providing remote direct memory access controls to separate data path from control path. Control operations are passed between the gateway and a control processor node, and data is passed between the gateway and a memory node via remote direct memory access operations. The memory node may also receive instructions for the remote direct memory access operations through proxy remote direct memory access messages received from the control processor node.Type: GrantFiled: March 9, 2005Date of Patent: September 3, 2013Assignee: Oracle America, Inc.Inventors: Whay Sing Lee, Richard W. Meyer, Charles D. Binford, Rodney A. Dekoning, William Stronge
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Patent number: 8396981Abstract: The invention provides a networking system, network system gateway, and method for managing the transfer of data between networks interconnected through the gateway. The gateway manages the communication paths and commands used in transferring data, as well as the logins associated with each network. The gateway further provides the ability to buffer data in order to accommodate latencies within the networks. Additionally, the gateway provides the ability to pipeline data across the networks.Type: GrantFiled: June 7, 2005Date of Patent: March 12, 2013Assignee: Oracle America, Inc.Inventors: Whay Sing Lee, Richard W. Meyer, Charles D. Binford, Rodney A. Dekoning, William Stronge
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Patent number: 6895485Abstract: In a storage area network having a host device and a consolidated storage array (CSA), one of the storage arrays of the CSA acts as a primary device of the CSA to form logical data volumes across one or more of the total storage arrays of the CSA. The logical data volumes typically have performance requirements that cannot be met by a single storage array. Upon receipt of a command from the host device to create one of the logical data volumes, the CSA primary device analyzes the storage arrays to determine a combination thereof, across which the logical data volume will be striped, that best satisfies the performance requirements. The CSA primary device configures these storage arrays to form the logical data volume and sends striping information, which defines the logical data volume, to the host device. Striping software based on the host device responds to the striping information to access the logical data volume.Type: GrantFiled: December 7, 2000Date of Patent: May 17, 2005Assignee: LSI Logic CorporationInventors: Rodney A. DeKoning, Charles D. Binford
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Patent number: 6754853Abstract: An array controller of a data storage system initiates a test of another array controller of the data storage system to determine the operational condition of the controller under test (CUT) as well as an array of storage devices to which the CUT is connected and a network fabric over which the CUT receives commands from host devices of the data storage system. If the CUT or devices connected thereto are not functioning properly, the controller initiating the test can diagnose the problem. The controller initiating the test instructs the CUT to perform certain normal operating functions, e.g. data read and write functions, and checks whether the functions are completed correctly. Additionally, a loopback test checks the operation of the network fabric, and the read and write functions also check the operation of the storage devices.Type: GrantFiled: December 7, 2000Date of Patent: June 22, 2004Assignee: LSI Logic CorporationInventors: Rodney A. DeKoning, Charles D. Binford
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Patent number: 6675268Abstract: In a storage environment or storage area network having multiple host devices and at least one storage array, the host devices access logical data volumes stored on the storage array through array controllers disposed in the storage array. Multiple host devices can request access to shared ones of the logical data volumes through multiple paths to multiple array controllers, but each logical data volume is controlled or owned by only one array controller at a time. Thus, ownership of shared logical data volumes is transferred between the array controllers as necessary on behalf of the requesting host devices. To prevent ownership transfers from occurring too often, however, ownership of the logical data volumes is made exclusive, or “sticky,” for a period of time after each transfer. During the exclusive ownership period of time, the ownership cannot be transferred.Type: GrantFiled: December 11, 2000Date of Patent: January 6, 2004Assignee: LSI Logic CorporationInventors: Rodney A. DeKoning, Charles D. Binford, Michael J. Gallagher, Ray M. Jantz
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Patent number: 6366965Abstract: Methods and associated apparatus for generating and maintaining a unique identity for an enclosure in a storage system. Where an enclosure compliant with storage industry standards is to maintain a unique identity, methods of the present invention are operable to coordinate use of redundant devices within the enclosure that serve, among other functions, to store and report the unique identity of the enclosure. The redundant devices (i.e., environmental service cards or modules) assure that the enclosure identity remains unique among such enclosures despite hot or cold swaps of the redundant devices among the several enclosures. A change number portion of the unique identity value stored in each of the redundant devices is updated (i.e., incremented) each time a change in the configuration of redundant devices is detected by the devices. An incumbent one of the redundant devices reports the unique identity for the enclosure in response to attached system requests.Type: GrantFiled: December 31, 1998Date of Patent: April 2, 2002Assignee: LSI Logic CorporationInventors: Charles D. Binford, Jeremy D. Stover
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Patent number: 6108684Abstract: Methods and associated apparatus for balancing the I/O request processing load within a plurality of controllers in a storage subsystem. The methods of the present invention are operable within interconnected controllers of a storage subsystem to shift the processing of received I/O requests to less loaded controllers and to do so in a manner transparent to legacy attached host systems. In a first embodiment of the present invention referred to as back-end load balancing, I/O requests are transferred from a first controller, to which the I/O request was directed by the attached host system, to a second controller for further processing. In this back-end load balancing embodiment, all write data associated with a write request as well as returned information including status or read data, is exchanged between the first and second controllers such that the first controller performs all communication with the attached host system.Type: GrantFiled: December 23, 1996Date of Patent: August 22, 2000Assignee: LSI Logic CorporationInventors: Rodney A. DeKoning, Gerald J. Fredin, Charles D. Binford
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Patent number: 6055228Abstract: A loop isolation circuit (LIC) to enable subdivision of a single daisy-chained communication loop (e.g., FC-AL) into smaller loops and to enable joining of smaller loops into a single larger loop. An LIC comprises essentially two multiplexors configured so as to permit controlled subdivision or joining of two loop portions. In a first selected state, the LIC subdivides a communication loop in which it is inserted into two loops. This configuration sacrifices accessibility among some devices previously on the larger loop for the benefit of enhanced bandwidth and reduced overhead due to node count. Bandwidth is enhanced by enabling simultaneous operation of two (or more) loop portions for establishing and communicating over logical circuit connections. However, when a failure of a redundant loop precludes access to devices, the LIC may be set to a second state to rejoin previously subdivided loops into a larger loop. This configuration restores access among all devices sharing common access to the larger loop.Type: GrantFiled: December 23, 1996Date of Patent: April 25, 2000Assignee: LSI Logic CorporationInventors: Rodney A. DeKoning, Charles D. Binford, Jeremy D. Stover
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Patent number: 5975738Abstract: Methods and associated apparatus within a RAID subsystem having redundant controllers define a private LUN as a data storage area known and accessible to all controllers in the system and used by them for diagnostic purposes. The methods involve sending a diagnostic write command to a first controller with instructions for it to write test data to the private LUN. This first controller writes this test data to the private LUN. A second controller, in response to another diagnostic command, then reads this test data from the private LUN and compares it to expected values provided in the diagnostic command. Using the results, it can then be determined which controller, if any, failed. If the first controller fails, then the second controller takes over ownership of portions of the data storage area assigned to the first controller. The private LUN is preferably striped across all channels used by the controllers to communicate to commonly attached disk drives.Type: GrantFiled: September 30, 1997Date of Patent: November 2, 1999Assignee: LSI Logic CorporationInventors: Rodney A. DeKoning, Gerald J. Fredin, Charles D. Binford
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Patent number: 5917723Abstract: A method for transferring data from a first device to a second device where the second device has a main data processor and a secondary processor associated therewith. The method includes the steps of (1) transferring a data stream having a control portion and a data portion from the first device to the second device, and (2) processing the data portion with the secondary processor in accordance with the control portion without interrupting the main data processor. A multi-controller apparatus which is useful for practicing the method is also disclosed.Type: GrantFiled: May 22, 1995Date of Patent: June 29, 1999Assignee: LSI Logic CorporationInventor: Charles D. Binford
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Patent number: 5883909Abstract: A method and apparatus for transferring data from a first device to a second device connected by a controller having a parity buffer and a memory having a first storage and a second storage is disclosed. The method includes the steps of transferring first data from the first device to the first storage; transferring second data from the first device to the second storage; transferring the first data to the second device and storing the first data in the parity buffer; and determining parity data from the second data and the first data stored in the parity buffer.Type: GrantFiled: November 6, 1996Date of Patent: March 16, 1999Assignee: LSI Logic CorporationInventors: Rodney A. DeKoning, Dennis E. Gates, Charles D. Binford
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Patent number: 5875343Abstract: Apparatus and associated methods for improving I/O performance in a computing system which includes one or more MPUs and one or more IOPs. I/O requests are queued by a requesting MPU in a memory shared with one or more IOPs. Each IOP is associated with a queue. Each IOP may continue processing queued I/O requests after completing processing on an earlier request. In addition, each MPU is associated with a queue shared with the IOPs. When an IOP completes processing of an I/O request, a completion message is added to the requesting MPU's queue and an interrupt is generated for that MPU. The MPU services all completion messages in its queue when the interrupt is processed. A threshold value is associated with each MPU queue. The threshold value indicates the minimum number of completed I/O requests required before an interrupt request is generated to the MPU.Type: GrantFiled: March 20, 1997Date of Patent: February 23, 1999Assignee: LSI Logic CorporationInventors: Charles D. Binford, Michael J. Gallagher, Craig C. McCombs
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Patent number: 5671365Abstract: Apparatus and associated methods for improving I/O performance in a computing system which includes one or more MPUs and one or more IOPs. I/O requests are queued by a requesting MPU in a memory shared with one or more IOPs. Each IOP is associated with a queue. Each IOP may continue processing queued I/O requests after completing processing on an earlier request. In addition, each MPU is associated with a queue shared with the IOPs. When an IOP completes processing of an I/O request, a completion message is added to the requesting MPU's queue and an interrupt is generated for that MPU. The MPU services all completion messages in its queue when the interrupt is processed. A threshold value is associated with each MPU queue. The threshold value indicates the minimum number of completed I/O requests required before an interrupt request is generated to the MPU.Type: GrantFiled: October 20, 1995Date of Patent: September 23, 1997Assignee: Symbios Logic Inc.Inventors: Charles D. Binford, Michael J. Gallagher, Craig C. McCombs
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Patent number: 5533190Abstract: A method for assuring consistency between data and parity in a disk array system following a reset or a power failure condition which interrupts the execution of write I/O operations. The method includes the steps of: examining drive activities to identify unfinished write I/O operations due to an interrupt condition; logging information necessary to identify the unfinished operations and the array redundancy groups associated with the unfinished operations into a non-volatile memory; and checking for log entries in the non-volatile memory during a disk array subsystem initialization or the restoration of power. For each unfinished operation identified in the log, the method further includes the steps of: performing a bit-wise exclusive-OR of corresponding portions of the data stored within the associated redundancy group to calculate parity consistent therewith; and writing the calculated parity to the parity storage areas within the associated redundancy group.Type: GrantFiled: December 21, 1994Date of Patent: July 2, 1996Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.Inventors: Charles D. Binford, Mark A. Gaertner, Steven P. Denny