Abstract: A digital loop filter includes a fine control circuit and a coarse control circuit. The fine control circuit adjusts a phase of a feedback clock signal by a first phase adjustment in response to a first phase error signal that indicates a sign of a phase error between a reference clock signal and the feedback clock signal. The coarse control circuit adjusts the phase of the feedback clock signal by a second phase adjustment in response to a second phase error signal. The second phase adjustment is larger than the first phase adjustment. The second phase error signal indicates a magnitude of a phase error between the reference clock signal and the feedback clock signal.

Abstract: A blind adaptive decision feedback equalizer technique relies on two thresholds. The first threshold is applied to the incoming sampled analog data. According to this aspect of the invention, if the signal magnitude exceeds the threshold, then it is considered valid, while if it is below the threshold, it is considered erroneous. This reduces processing, because not every sample generates an error signal. The second threshold is a block threshold that determines when the filter coefficients are updated to account for the incoming data. In accordance with this aspect of the invention, only when a certain number of errors has been accumulated are the coefficients updated. This results in a further reduction in processing.

Abstract: A digital loop filter includes a fine control circuit and a coarse control circuit. The fine control circuit adjusts a phase of a feedback clock signal by a first phase adjustment in response to a first phase error signal that indicates a sign of a phase error between a reference clock signal and the feedback clock signal. The coarse control circuit adjusts the phase of the feedback clock signal by a second phase adjustment in response to a second phase error signal. The second phase adjustment is larger than the first phase adjustment. The second phase error signal indicates a magnitude of a phase error between the reference clock signal and the feedback clock signal.