Patents by Inventor Charles E. Larson
Charles E. Larson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7846288Abstract: Methods and systems for removing protective films from microfeature workpieces are disclosed herein. One particular embodiment of such a method comprises separating at least a portion of a protective tape from a workpiece to which the protective tape is attached with a separator configured to drive against an interface between the protective tape and the workpiece. The method further includes engaging the portion of the protective tape detached from the workpiece with a removal system.Type: GrantFiled: May 10, 2006Date of Patent: December 7, 2010Assignee: Micron Technology, Inc.Inventors: Charles E. Larson, Randall S. Parker
-
Patent number: 7208410Abstract: Methods relating to forming interconnects through injection of conductive materials, to fabricating semiconductor component assemblies, and to resulting assemblies. A semiconductor component substrate, such as a semiconductor die or other substrate, has dielectric material disposed on a surface thereof, surrounding but not covering interconnect elements, such as bond pads, on that surface. A second semiconductor component substrate, such as a carrier substrate with interconnect elements such as terminal pads, is adhered to the first semiconductor component substrate, forming a semiconductor package assembly having interconnect voids between the corresponding interconnect elements. A flowable conductive material is then injected into each interconnect void using an injection needle that passes through one of the substrates into the interconnect void, forming a conductive interconnect between the bond pads and terminal pads of the substrates.Type: GrantFiled: March 15, 2006Date of Patent: April 24, 2007Assignee: Micron Technology, Inc.Inventor: Charles E. Larson
-
Patent number: 7208839Abstract: Methods relating to forming interconnects through injection of conductive materials, to fabricating semiconductor component assemblies, and to resulting assemblies. A semiconductor component substrate, such as a semiconductor die or other substrate, has dielectric material disposed on a surface thereof, surrounding but not covering interconnect elements, such as bond pads, on that surface. A second semiconductor component substrate, such as a carrier substrate with interconnect elements such as terminal pads, is adhered to the first semiconductor component substrate, forming a semiconductor package assembly having interconnect voids between the corresponding interconnect elements. A flowable conductive material is then injected into each interconnect void using an injection needle that passes through one of the substrates into the interconnect void, forming a conductive interconnect between the bond pads and terminal pads of the substrates.Type: GrantFiled: May 6, 2005Date of Patent: April 24, 2007Assignee: Micron Technology, Inc.Inventor: Charles E. Larson
-
Patent number: 6982869Abstract: A folded interposer used to achieve a high density semiconductor package is disclosed. The folded interposer is comprised of a thin, flexible material that can be folded around one or multiple semiconductor dice in a serpentine fashion. The semiconductor dice are then attached to a substrate through electrical contacts on the interposer. The folded interposer allows multiple semiconductor dice to be efficiently stacked in a high density semiconductor package by reducing the unused or wasted space between stacked semiconductor dice. Vias extending through the folded interposer provide electrical communication between the semiconductor dice and the substrate. The present invention also relates to a method of packaging semiconductor dice in a high density arrangement and a method of forming the high density semiconductor package.Type: GrantFiled: November 7, 2002Date of Patent: January 3, 2006Assignee: Micron Technology, Inc.Inventor: Charles E. Larson
-
Patent number: 6982191Abstract: Methods relating to forming interconnects through injection of conductive materials, to fabricating semiconductor component assemblies, and to resulting assemblies. A semiconductor component substrate, such as a semiconductor die or other substrate, has dielectric material disposed on a surface thereof, surrounding but not covering interconnect elements, such as bond pads, on that surface. A second semiconductor component substrate, such as a carrier substrate with interconnect elements such as terminal pads, is adhered to the first semiconductor component substrate, forming a semiconductor package assembly having interconnect voids between the corresponding interconnect elements. A flowable conductive material is then injected into each interconnect void using an injection needle that passes through one of the substrates into the interconnect void, forming a conductive interconnect between the bond pads and terminal pads of the substrates.Type: GrantFiled: September 19, 2003Date of Patent: January 3, 2006Assignee: Micron Technology, Inc.Inventor: Charles E. Larson
-
Patent number: 6914317Abstract: A microelectronic substrate and method for manufacture. In one embodiment, the microelectronic substrate includes a body having a first surface, a second surface facing a direction opposite from the first surface, and a plurality of voids in the body between the first and second surfaces. The voids can extend from the first surface to a separation region beneath the first surface. At least one operable microelectronic device is formed at and/or proximate to the first surface of the substrate material, and then a first stratum of the microelectronic substrate above the separation region is separated from a second stratum of the microelectronic substrate below the separation region. The first stratum of the microelectronic substrate can be further separated into discrete microelectronic dies before the first stratum is separated from the second stratum. In one aspect of this embodiment, the substrate can support a film and microelectronic devices can be formed in the film and/or in the substrate.Type: GrantFiled: August 21, 2003Date of Patent: July 5, 2005Assignee: Micron Technology, Inc.Inventors: Charles E. Larson, Timothy E. Murphy, Bryan L. Taylor, Jon M. Long, Mark W. Ellis, Vincent L. Riley
-
Patent number: 6884653Abstract: A folded interposer used to achieve a high density semiconductor package is disclosed. The folded interposer is comprised of a thin, flexible material that can be folded around one or multiple semiconductor dice in a serpentine fashion. The semiconductor dice are then attached to a substrate through electrical contacts on the interposer. The folded interposer allows multiple semiconductor dice to be efficiently stacked in a high density semiconductor package by reducing the unused or waster space between stacked semiconductor dice. Vias extending through the folded interposer provide electrical communication between the semiconductor dice and the substrate. The present invention also relates to a method of packaging semiconductor dice in a high density arrangement and a method of forming the high density semiconductor package.Type: GrantFiled: March 21, 2001Date of Patent: April 26, 2005Assignee: Micron Technology, Inc.Inventor: Charles E. Larson
-
Publication number: 20040038500Abstract: A microelectronic substrate and method for manufacture. In one embodiment, the microelectronic substrate includes a body having a first surface, a second surface facing a direction opposite from the first surface, and a plurality of voids in the body between the first and second surfaces. The voids can extend from the first surface to a separation region beneath the first surface. At least one operable microelectronic device is formed at and/or proximate to the first surface of the substrate material, and then a first stratum of the microelectronic substrate above the separation region is separated from a second stratum of the microelectronic substrate below the separation region. The first stratum of the microelectronic substrate can be further separated into discrete microelectronic dies before the first stratum is separated from the second stratum. In one aspect of this embodiment, the substrate can support a film and microelectronic devices can be formed in the film and/or in the substrate.Type: ApplicationFiled: August 21, 2003Publication date: February 26, 2004Inventors: Charles E. Larson, Timothy E. Murphy, Bryan L. Taylor, Jon M. Long, Mark W. Ellis, Vincent L. Riley
-
Patent number: 6693342Abstract: A microelectronic substrate and method for manufacture. In one embodiment, the microelectronic substrate includes a body having a first surface, a second surface facing a direction opposite from the first surface, and a plurality of voids in the body between the first and second surfaces. The voids can extend from the first surface to a separation region beneath the first surface. At least one operable microelectronic device is formed at and/or proximate to the first surface of the substrate material, and then a first stratum of the microelectronic substrate above the separation region is separated from a second stratum of the microelectronic substrate below the separation region. The first stratum of the microelectronic substrate can be further separated into discrete microelectronic dies before the first stratum is separated from the second stratum. In one aspect of this embodiment, the substrate can support a film and microelectronic devices can be formed in the film and/or in the substrate.Type: GrantFiled: April 30, 2001Date of Patent: February 17, 2004Assignee: Micron Technology, Inc.Inventors: Charles E. Larson, Timothy E. Murphy, Bryan L. Taylor, Jon M. Long, Mark W. Ellis, Vincent L. Riley
-
Publication number: 20030069654Abstract: A folded interposer used to achieve a high density semiconductor package is disclosed. The folded interposer is comprised of a thin, flexible material that can be folded around one or multiple semiconductor die in a serpentine fashion. The semiconductor die are then attached to a substrate through electrical contacts on the interposer. The folded interposer allows multiple semiconductor die to be efficiently stacked in a high density semiconductor package by reducing the unused or wasted space between stacked semiconductor die. Vias extending through the folded interposer provide electrical communication between the semiconductor die and the substrate. The present invention also relates to a method of packaging semiconductor die in a high density arrangement and a method of forming the high density semiconductor package.Type: ApplicationFiled: November 7, 2002Publication date: April 10, 2003Inventor: Charles E. Larson
-
Publication number: 20030062614Abstract: A folded interposer used to achieve a high density semiconductor package is disclosed. The folded interposer is comprised of a thin, flexible material that can be folded around one or multiple semiconductor die in a serpentine fashion. The semiconductor die are then attached to a substrate through electrical contacts on the interposer. The folded interposer allows multiple semiconductor die to be efficiently stacked in a high density semiconductor package by reducing the unused or wasted space between stacked semiconductor die. Vias extending through the folded interposer provide electrical communication between the semiconductor die and the substrate. The present invention also relates to a method of packaging semiconductor die in a high density arrangement and a method of forming the high density semiconductor package.Type: ApplicationFiled: November 7, 2002Publication date: April 3, 2003Inventor: Charles E. Larson
-
Publication number: 20020137252Abstract: A folded interposer used to achieve a high density semiconductor package is disclosed. The folded interposer is comprised of a thin, flexible material that can be folded around one or multiple semiconductor die in a serpentine fashion. The semiconductor die are then attached to a substrate through electrical contacts on the interposer. The folded interposer allows multiple semiconductor die to be efficiently stacked in a high density semiconductor package by reducing the unused or wasted space between stacked semiconductor die. Vias extending through the folded interposer provide electrical communication between the semiconductor die and the substrate. The present invention also relates to a method of packaging semiconductor die in a high density arrangement and a method of forming the high density semiconductor package.Type: ApplicationFiled: March 21, 2001Publication date: September 26, 2002Inventor: Charles E. Larson
-
Publication number: 20010051415Abstract: A microelectronic substrate and method for manufacture. In one embodiment, the microelectronic substrate includes a body having a first surface, a second surface facing a direction opposite from the first surface, and a plurality of voids in the body between the first and second surfaces. The voids can extend from the first surface to a separation region beneath the first surface. At least one operable microelectronic device is formed at and/or proximate to the first surface of the substrate material, and then a first stratum of the microelectronic substrate above the separation region is separated from a second stratum of the microelectronic substrate below the separation region. The first stratum of the microelectronic substrate can be further separated into discrete microelectronic dies before the first stratum is separated from the second stratum. In one aspect of this embodiment, the substrate can support a film and microelectronic devices can be formed in the film and/or in the substrate.Type: ApplicationFiled: April 30, 2001Publication date: December 13, 2001Inventors: Charles E. Larson, Timothy E. Murphy, Bryan L. Taylor, Jon M. Long, Mark W. Ellis, Vincent L. Riley
-
Patent number: 6303469Abstract: A microelectronic substrate and method for manufacture. In one embodiment, the microelectronic substrate includes a body having a first surface, a second surface facing a direction opposite from the first surface, and a plurality of voids in the body between the first and second surfaces. The voids can extend from the first surface to a separation region beneath the first surface. At least one operable microelectronic device is formed at and/or proximate to the first surface of the substrate material, and then a first stratum of the microelectronic substrate above the separation region is separated from a second stratum of the microelectronic substrate below the separation region. The first stratum of the microelectronic substrate can be further separated into discrete microelectronic dies before the first stratum is separated from the second stratum. In one aspect of this embodiment, the substrate can support a film and microelectronic devices can be formed in the film and/or in the substrate.Type: GrantFiled: June 7, 2000Date of Patent: October 16, 2001Assignee: Micron Technology, Inc.Inventors: Charles E. Larson, Timothy E. Murphy, Bryan L. Taylor, Jon M. Long, Mark W. Ellis, Vincent L. Riley
-
Patent number: 4042743Abstract: A compressible offset printing blanket comprising a compressible cellular elastomeric layer or layers which contain resin microballoons in an elastomeric material. Preferably the compressible cellular elastomeric layer(s) is deposited from a layer of a cement of the uncured elastomer with which the resin microballoons have been admixed.Type: GrantFiled: February 2, 1976Date of Patent: August 16, 1977Assignee: Uniroyal, Inc.Inventors: Charles E. Larson, Richard T. Nojiri