Patents by Inventor Charles E. Mari

Charles E. Mari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10528477
    Abstract: A computer-implemented method includes pseudo-invalidating a first Dynamic Address Translation (DAT) table of a DAT structure associated with a workload. A page fault occurring during translation of a virtual memory address of data required by the workload is detected. Responsive to the page fault, the DAT structure is traversed. The DAT structure includes one or more DAT tables, and each DAT entry in each of the one or more DAT tables is associated with an in-use bit indicating whether the DAT entry is in use. Traversing the DAT structure includes pseudo-invalidating each of one or more DAT entries in the DAT structure that are involved in translating the virtual memory address for which the page fault occurred; and identifying a first page frame referenced by the virtual memory address for which the page fault occurred. The data in the first page frame is processed responsive to the page fault.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: January 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Steven M. Partlow, Elpida Tzortzatos
  • Patent number: 10372352
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: August 6, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Publication number: 20180314557
    Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.
    Type: Application
    Filed: September 4, 2015
    Publication date: November 1, 2018
    Inventors: David Hom, Charles E. Mari, Robert J. Miller, JR., Harris M. Morgenstern, Elpida Tzortzatos
  • Patent number: 10114853
    Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: October 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Hom, Charles E. Mari, Robert J. Miller, Jr., Harris M. Morgenstern, Elpida Tzortzatos
  • Publication number: 20180307618
    Abstract: A computer-implemented method includes pseudo-invalidating a first Dynamic Address Translation (DAT) table of a DAT structure associated with a workload. A page fault occurring during translation of a virtual memory address of data required by the workload is detected. Responsive to the page fault, the DAT structure is traversed. The DAT structure includes one or more DAT tables, and each DAT entry in each of the one or more DAT tables is associated with an in-use bit indicating whether the DAT entry is in use. Traversing the DAT structure includes pseudo-invalidating each of one or more DAT entries in the DAT structure that are involved in translating the virtual memory address for which the page fault occurred; and identifying a first page frame referenced by the virtual memory address for which the page fault occurred. The data in the first page frame is processed responsive to the page fault.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Inventors: Charles E. Mari, Steven M. Partlow, Elpida Tzortzatos
  • Patent number: 10108466
    Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: October 23, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Hom, Charles E. Mari, Robert Miller, Jr., Harris M. Morgenstern, Elpida Tzortzatos
  • Patent number: 9697143
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: July 4, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Patent number: 9696924
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: July 4, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Publication number: 20170161207
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Application
    Filed: February 23, 2017
    Publication date: June 8, 2017
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Publication number: 20170091118
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Publication number: 20170090789
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Application
    Filed: March 14, 2016
    Publication date: March 30, 2017
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Patent number: 9606732
    Abstract: A method, system, and computer program product to verify serialization of storage frames within an address space via multi-threaded programs is described. The method includes dynamically scaling a number of units of work based on a number of available processors, each of the units of work configured to execute actions, and dynamically scaling an amount and page size of virtual storage accessed by each of the units of work based on a total available memory. The method also includes obtaining, at each of the units of work, different types of storage pages and accessing storage pages corresponding with the respective different types of virtual storage pages associated with the different frame sizes and attributes and performing a respective action, and verifying, for each of the units of work performing the respective action, a state and data content of the storage pages.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: March 28, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alfred F. Foster, Charles E. Mari, Robert Miller, Jr., Harris M. Morgenstern, Thomas F. Rankin, Elpida Tzortzatos
  • Publication number: 20160378572
    Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.
    Type: Application
    Filed: June 29, 2015
    Publication date: December 29, 2016
    Inventors: David Hom, Charles E. Mari, Robert Miller, JR., Harris M. Morgenstern, Elpida Tzortzatos
  • Publication number: 20160274943
    Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.
    Type: Application
    Filed: September 4, 2015
    Publication date: September 22, 2016
    Inventors: David Hom, Charles E. Mari, Robert J. Miller, JR., Harris M. Morgenstern, Elpida Tzortzatos
  • Publication number: 20150347021
    Abstract: A method, system, and computer program product to verify serialization of storage frames within an address space via multi-threaded programs is described. The method includes dynamically scaling a number of units of work based on a number of available processors, each of the units of work configured to execute actions, and dynamically scaling an amount and page size of virtual storage accessed by each of the units of work based on a total available memory. The method also includes obtaining, at each of the units of work, different types of storage pages and accessing storage pages corresponding with the respective different types of virtual storage pages associated with the different frame sizes and attributes and performing a respective action, and verifying, for each of the units of work performing the respective action, a state and data content of the storage pages.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 3, 2015
    Applicant: International Business Machines Corporation
    Inventors: Alfred F. Foster, Charles E. Mari, Robert Miller, JR., Harris M. Morgenstern, Thomas F. Rankin, Elpida Tzortzatos
  • Patent number: 9164915
    Abstract: Embodiments of the disclosure include a method for reserving large pages in a large frame area (LFAREA) of a main memory. The method includes pre-scanning a plurality of storage increments and counting a number of available large pages that are online and issuing a message that indicates the number of available large pages. The method also includes receiving and parsing an LFAREA request including a target number of large pages to be reserved. The method further includes calculating an optimal number of large pages to be reserved, based upon the target number of available pages and a system limit. The method includes determining if the LFAREA request is valid and if the LFAREA request can be satisfied and scanning the plurality of the storage increments and reserving the optimal number of pages in the LFAREA.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: October 20, 2015
    Assignee: International Business Machines Corporation
    Inventors: Alfred F. Foster, David Hom, Charles E. Mari, Matthew J. Mauriello, Robert Miller, Jr., Mariama Ndoye, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 8966220
    Abstract: Embodiments of the disclosure include a method for optimizing large page processing. The method includes receiving an indication that a real memory includes a first page. The first page includes a plurality of smaller pages. The method also includes determining a page frame table entry associated with a first smaller page of the first page and storing data associated with the first page in the page frame table entry associated with the first smaller page. The page frame table entry associated with the first smaller page of the first page is a data repository for the plurality of smaller pages of the first page.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Alfred F. Foster, David Horn, Charles E. Mari, Matthew J. Mauriello, Robert Miller, Jr., Mariama Ndoye, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 8918617
    Abstract: Embodiments relate to methods, systems and computer program products for defragmenting storage class memory by comparing a utilization rate of the storage class memory to a threshold value. If the utilization rate of the storage class memory is greater than the threshold value, the potentially wasted storage space is then compared to the combined storage capacity of the unclaimed extents of the storage class memory. If the potentially wasted storage space is greater than the combined storage capacity of the unclaimed extents of the storage class memory, a determination is made whether a defragmentation was recently performed. Based on determining that the defragmentation was not recently performed, or that it was recently performed and was productive, performing a defragmentation of the storage class memory.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Christopher G. Brooker, Alfred F. Foster, Charles E. Mari, Robert Miller, Jr., Harris M. Morgenstern, Walter W. Otto, Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 8868876
    Abstract: Dedicated large page memory pools are provided to, at least in part, facilitate access to large pages. The large page memory is managed by: establishing multiple large page memory pools, each large page memory pool of the multiple large page memory pools including a number of large pages; and dedicating each large page memory pool of the multiple large page memory pools to a respective processor of multiple processors of the computing environment, wherein processors of the multiple processors can concurrently access pages from the respective large page memory pools of the multiple large page memory pools.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Alfred F. Foster, David Hom, Charles E. Mari, Matthew J. Mauriello, Robert Miller, Jr., Mariama Ndoye, Michael G. Spiegel, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos, Chun-Kwan K. Yee
  • Patent number: 8799611
    Abstract: Allocation of pages of memory is managed in computing environments that include multiple sized memory pools. Responsive to a request for a page of memory, one or more memory pools are searched for an available frame of memory to service the request. The search uses a predefined order of search, which includes multiple types of memory pools in a specific order based on the requested size of the page of memory.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: August 5, 2014
    Assignee: International Business Machines Corporation
    Inventors: Alfred F. Foster, David Horn, Charles E. Mari, Matthew J. Mauriello, Robert Miller, Jr., Mariama Ndoye, Michael G. Spiegel, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos, Chun Kwan K. Yee