Abstract: A clock generator includes an input coupled to receive an input clock signal from a first clock source, and a noise rejection circuit configured to provide an output clock signal based on the input clock signal. The noise rejection circuit includes an event generator having a digital counter circuit. The event generator is configured to generate a first event signal based on a count value of the digital counter circuit, in which the noise rejection circuit is configured to produce an edge on the output clock signal in response to both the event signal and a state of the input clock signal.

Abstract: An integrated circuit that can include a driver having a first driver output, and a first resistance coupled between a first node coupled to the first driver output and a second node. The first resistance can include a process resistor including a first material having a first temperature coefficient, and an interconnect resistor configured to provide at least 20% of the first resistance and including a second material having a second temperature coefficient which changes resistance in an opposite direction with temperature as compared to the first temperature coefficient. A first terminal of the interconnect resistor is directly connected to a first terminal of the process resistor.

Abstract: An integrated circuit that can include a driver having a first driver output, and a first resistance coupled between a first node coupled to the first driver output and a second node. The first resistance can include a process resistor including a first material having a first temperature coefficient, and an interconnect resistor configured to provide at least 20% of the first resistance and including a second material having a second temperature coefficient which changes resistance in an opposite direction with temperature as compared to the first temperature coefficient. A first terminal of the interconnect resistor is directly connected to a first terminal of the process resistor.

Abstract: A receiver includes an input node coupled to receive an analog signal, a first switch coupled between the input node and a first node, a second switch coupled between the input node and a second node, a first resistive element coupled between the first node and a reference node, a second resistive element coupled between the second node and the reference node, a first capacitive element coupled to the first node, and a second capacitive element coupled to the second node. The receiver also includes a comparator having a first input coupled to the input node to receive the analog signal, and a second input coupled to the reference node to receive a reference voltage, wherein an output of the comparator controls the first and second switches.

Abstract: A temperature sensor configured to, after a predetermined number of stop counting assertions, determine the temperature dependent voltage and thus the temperature at the output of a counter. During a calibration phase, when a counter value is not equal to a test counter value in a pulse generator circuit, capacitance of the temperature sensor is adjusted until the counter value is equal to the test counter value.

Abstract: A back bias voltage generator circuit includes a first resistive element connected in series with a second resistive element; a first amplifier having a first input coupled to an input voltage, a second input coupled to a first node at a first terminal of the first resistive element, and an output coupled to an N-polarity metal-oxide semiconductor (NMOS) bias voltage node. A second amplifier has a first input coupled to a symmetrical voltage, a second input coupled to a second node between a second terminal of the first resistive element and a first terminal of the second resistive element, and an output coupled to a P-polarity metal-oxide semiconductor (PMOS) bias voltage node and the second terminal of the second resistive element. The symmetrical voltage is between a highest supply voltage and a lowest supply voltage coupled to the first amplifier.

Abstract: A back bias voltage generator circuit includes a first resistive element connected in series with a second resistive element; a first amplifier having a first input coupled to an input voltage, a second input coupled to a first node at a first terminal of the first resistive element, and an output coupled to an N-polarity metal-oxide semiconductor (NMOS) bias voltage node. A second amplifier has a first input coupled to a symmetrical voltage, a second input coupled to a second node between a second terminal of the first resistive element and a first terminal of the second resistive element, and an output coupled to a P-polarity metal-oxide semiconductor (PMOS) bias voltage node and the second terminal of the second resistive element. The symmetrical voltage is between a highest supply voltage and a lowest supply voltage coupled to the first amplifier.

Abstract: A temperature sensor configured to, after a predetermined number of stop counting assertions, determine the temperature dependent voltage and thus the temperature at the output of a counter. During a calibration phase, when a counter value is not equal to a test counter value in a pulse generator circuit, capacitance of the temperature sensor is adjusted until the counter value is equal to the test counter value.

Abstract: An audio amplifier includes an output stage for generating an output stage voltage in response to an input signal and an output stage quiescent current. A controlled current source controls the output stage quiescent current in response to a quiescent current signal during a start-up cycle.

Abstract: An audio output circuit includes a DAC module, a line out circuit, and a headphone amplifier circuit. The digital to analog conversion (DAC) module is coupled to convert an audio component of digitized multimedia data into an analog audio signal. The line out circuit is coupled to amplify the analog audio signal based on a line out volume setting. The headphone amplifier is coupled to amplify the analog audio signal based on a volume setting to produce an amplified analog audio signal.

Abstract: An audio output circuit includes a DAC module, a line out circuit, and a headphone amplifier circuit. The digital to analog conversion (DAC) module is coupled to convert an audio component of digitized multimedia data into an analog audio signal. The line out circuit is coupled to amplify the analog audio signal based on a line out volume setting. The headphone amplifier is coupled to amplify the analog audio signal based on a volume setting to produce an amplified analog audio signal.

Abstract: A differential audio amplifier includes a differential input stage for producing an output voltage in response to a differential audio input signal. The differential input stage has a first bias voltage and a second basis voltage. A bias compensation module controls the first bias voltage to be substantially equal to the second bias voltage.

Abstract: A vehicular audio system receives audio inputs from audio sources and a radio receiver. Analog audio is converted to digital, and digital audio remains natural digital. The receiver front end converts a radio signal to an intermediate frequency then an ADC converts that to a digital signal. The inputs that are converted to digital are selectively mixed with each other and with the natural digital signals. This allows for sounds from multiple sources to be heard simultaneously so that a telephone ring may be provided without requiring background music to be interrupted and for uses such as voice by microphone over a music tape. A reference frequency to the receiver front end of 7.2 MHz is particularly beneficial for noise reduction and consequent mixing of digital audio at 48 KHz, the standard frequency for typical digital audio inputs.

Abstract: A vehicular audio system receives audio inputs from audio sources and a radio receiver. Analog audio is converted to digital, and digital audio remains natural digital. The receiver front end converts a radio signal to an intermediate frequency then an ADC converts that to a digital signal. The inputs that are converted to digital are selectively mixed with each other and with the natural digital signals. This allows for sounds from multiple sources to be heard simultaneously so that a telephone ring may be provided without requiring background music to be interrupted and for uses such as voice by microphone over a music tape. A reference frequency to the receiver front end of 7.2 MHz is particularly beneficial for noise reduction and consequent mixing of digital audio at 48 KHz, the standard frequency for typical digital audio inputs.