Patents by Inventor Charles H. Wilson
Charles H. Wilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10734346Abstract: Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.Type: GrantFiled: January 17, 2019Date of Patent: August 4, 2020Assignee: ELPIS TECHNOLOGIES INC.Inventors: Richard S. Graf, Jay F. Leonard, David J. West, Charles H. Wilson
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Publication number: 20190244926Abstract: Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.Type: ApplicationFiled: April 18, 2019Publication date: August 8, 2019Inventors: Richard S. Graf, Jay F. Leonard, David J. West, Charles H. Wilson
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Patent number: 10340241Abstract: Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.Type: GrantFiled: June 11, 2015Date of Patent: July 2, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard S. Graf, Jay F. Leonard, David J. West, Charles H. Wilson
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Publication number: 20190148328Abstract: Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.Type: ApplicationFiled: January 17, 2019Publication date: May 16, 2019Inventors: Richard S. GRAF, Jay F. LEONARD, David J. WEST, Charles H. WILSON
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Patent number: 9754911Abstract: Aspects of the present disclosure include integrated circuit (IC) structures with angled interconnect elements. An IC structure according to the present disclosure can include: an IC chip interconnect surface including a radially inner region positioned within a radially outer region; and a plurality of conductive pillars extending outward from the radially inner region of the IC chip interconnect surface, relative to a radial centerline axis of the radially inner region of the IC chip interconnect surface, wherein the radially inner region of the IC chip interconnect surface is free of conductive pillars thereon.Type: GrantFiled: October 5, 2015Date of Patent: September 5, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: David J. West, Charles H. Wilson, Richard S. Graf
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Publication number: 20170098623Abstract: Aspects of the present disclosure include integrated circuit (IC) structures with angled interconnect elements. An IC structure according to the present disclosure can include: an IC chip interconnect surface including a radially inner region positioned within a radially outer region; and a plurality of conductive pillars extending outward from the radially inner region of the IC chip interconnect surface, relative to a radial centerline axis of the radially inner region of the IC chip interconnect surface, wherein the radially inner region of the IC chip interconnect surface is free of conductive pillars thereon.Type: ApplicationFiled: October 5, 2015Publication date: April 6, 2017Inventors: David J. West, Charles H. Wilson, Richard S. Graf
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Publication number: 20160365328Abstract: Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.Type: ApplicationFiled: June 11, 2015Publication date: December 15, 2016Inventors: Richard S. GRAF, Jay F. LEONARD, David J. WEST, Charles H. WILSON
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Publication number: 20160365329Abstract: Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.Type: ApplicationFiled: March 29, 2016Publication date: December 15, 2016Inventors: Richard S. GRAF, Jay F. LEONARD, David J. WEST, Charles H. WILSON
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Patent number: 9368425Abstract: Embodiments of the invention relate to incorporating one or more antennas or inductor coils into a semi-conductor package. A heat spreader or metal sheet is embedded in the package and stamped or otherwise patterned into a spiral or serpentine form. The pattern enables the spreader to function as an inductor or antenna when connected to a semiconductor chip in communication with a printed circuit board.Type: GrantFiled: December 20, 2013Date of Patent: June 14, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Richard S. Graf, Jay F. Leonard, David J. West, Charles H. Wilson
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Publication number: 20150179542Abstract: Embodiments of the invention relate to incorporating one or more antennas or inductor coils into a semi-conductor package. A heat spreader or metal sheet is embedded in the package and stamped or otherwise patterned into a spiral or serpentine form. The pattern enables the spreader to function as an inductor or antenna when connected to a semiconductor chip in communication with a printed circuit board.Type: ApplicationFiled: December 20, 2013Publication date: June 25, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard S. Graf, Jay F. Leonard, David J. West, Charles H. Wilson
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Patent number: 8134225Abstract: A QFN package with improved joint solder thickness for improved second level attachment fatigue life. The copper leadframe of a QFN chip carrier is provided with rounded protrusions in both the chip attach pad region and the surrounding lead regions before second level attachment. The rounded stand-off protrusions are formed from the copper itself of the copper of the leadframe. This may be achieved by punching dimples into one surface of the copper plate of the leadframe before plating to form protrusions on the opposing surface. This method of forming the rounded protrusions simplifies the process of forming stand-offs. The protrusions provide a structure that increases wetting area and allows the use of a larger quantity of solder for increased solder joint thickness and better die paddle solder joint area coverage. As a result of the increased solder joint thickness, second level fatigue life is significantly improved.Type: GrantFiled: June 30, 2008Date of Patent: March 13, 2012Assignee: International Business Machines CorporationInventors: John J. Maloney, Robert M. Smith, Charles H. Wilson
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Publication number: 20090064763Abstract: A test environment and an associated method of testing and analyzing a semiconductor package material containing a molding compound, for stability in a sustained oxygen environment. Test samples are exposed to a pressurized gas containing oxygen, under elevated temperature below the glass transition temperature of the molding compound. Control samples are exposed to a pressurized inert gas under similar or more severe conditions of gas pressure, temperature, and humidity. At least one characteristic common to the test samples and the control samples is measured. A determination is made as to whether there exists at least one significant difference between the at least one measured characteristic of the test samples and the control samples.Type: ApplicationFiled: July 18, 2008Publication date: March 12, 2009Inventors: Joseph K. V. Comeau, Adele M. Mahoney, Jason P. Ritter, Gerald J. Scilla, Charles H. Wilson
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Publication number: 20080265396Abstract: A QFN package with improved joint solder thickness for improved second level attachment fatigue life. The copper leadframe of a QFN chip carrier is provided with rounded protrusions in both the chip attach pad region and the surrounding lead regions before second level attachment. The rounded stand-off protrusions are formed from the copper itself of the copper of the leadframe. This may be achieved by punching dimples into one surface of the copper plate of the leadframe before plating to form protrusions on the opposing surface. This method of forming the rounded protrusions simplifies the process of forming stand-offs. The protrusions provide a structure that increases wetting area and allows the use of a larger quantity of solder for increased solder joint thickness and better die paddle solder joint area coverage. As a result of the increased solder joint thickness, second level fatigue life is significantly improved.Type: ApplicationFiled: June 30, 2008Publication date: October 30, 2008Applicant: International Business Machines CorporationInventors: John J. Maloney, Robert M. Smith, Charles H. Wilson
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Patent number: 7442552Abstract: A test environment and an associated method of testing and analyzing a semiconductor package material containing a molding compound, for stability in a sustained oxygen environment. Test samples are exposed to a pressurized gas containing oxygen, under elevated temperature below the glass transition temperature of the molding compound. Control samples are exposed to a pressurized inert gas under similar or more severe conditions of gas pressure, temperature, and humidity. At least one characteristic common to the test samples and the control samples is measured. A determination is made as to whether there exists at least one significant difference between the at least one measured characteristic of the test samples and the control samples.Type: GrantFiled: September 26, 2007Date of Patent: October 28, 2008Assignee: International Business Machines CorporationInventors: Joseph K. V. Comeau, Adele M. Mahoney, Jason P. Ritter, Gerald J. Scilla, Charles H. Wilson
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Publication number: 20080203546Abstract: A QFN package with improved joint solder thickness for improved second level attachment fatigue life. The copper leadframe of a QFN chip carrier is provided with rounded protrusions in both the chip attach pad region and the surrounding lead regions before second level attachment. The rounded stand-off protrusions are formed from the copper itself of the copper of the leadframe. This may be achieved by punching dimples into one surface of the copper plate of the leadframe before plating to form protrusions on the opposing surface. This method of forming the rounded protrusions simplifies the process of forming stand-offs. The protrusions provide a structure that increases wetting area and allows the use of a larger quantity of solder for increased solder joint thickness and better die paddle solder joint area coverage. As a result of the increased solder joint thickness, second level fatigue life is significantly improved.Type: ApplicationFiled: May 5, 2008Publication date: August 28, 2008Applicant: International Business Machines CorporationInventors: John J. Maloney, Robert M. Smith, Charles H. Wilson
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Patent number: 7405106Abstract: A QFN package with improved joint solder thickness for improved second level attachment fatigue life. The copper leadframe of a QFN chip carrier is provided with rounded protrusions in both the chip attach pad region and the surrounding lead regions before second level attachment. The rounded stand-off protrusions are formed from the copper itself of the copper of the leadframe. This may be achieved by punching dimples into one surface of the copper plate of the leadframe before plating to form protrusions on the opposing surface. This method of forming the rounded protrusions simplifies the process of forming stand-offs. The protrusions provide a structure that increases wetting area and allows the use of a larger quantity of solder for increased solder joint thickness and better die paddle solder joint area coverage. As a result of the increased solder joint thickness, second level fatigue life is significantly improved.Type: GrantFiled: May 23, 2006Date of Patent: July 29, 2008Assignee: International Business Machines CorporationInventors: John J. Maloney, Robert M. Smith, Charles H. Wilson
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Publication number: 20070273017Abstract: A QFN package with improved joint solder thickness for improved second level attachment fatigue life. The copper leadframe of a QFN chip carrier is provided with rounded protrusions in both the chip attach pad region and the surrounding lead regions before second level attachment. The rounded stand-off protrusions are formed from the copper itself of the copper of the leadframe. This may be achieved by punching dimples into one surface of the copper plate of the leadframe before plating to form protrusions on the opposing surface. This method of forming the rounded protrusions simplifies the process of forming stand-offs. The protrusions provide a structure that increases wetting area and allows the use of a larger quantity of solder for increased solder joint thickness and better die paddle solder joint area coverage. As a result of the increased solder joint thickness, second level fatigue life is significantly improved.Type: ApplicationFiled: May 23, 2006Publication date: November 29, 2007Applicant: International Business Machines CorporationInventors: John J. Maloney, Robert M. Smith, Charles H. Wilson
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Patent number: 7300796Abstract: A test environment and an associated method of testing and analyzing a semiconductor package material containing a molding compound, for stability in a sustained oxygen environment. Test samples are exposed to a pressurized gas containing oxygen, under elevated temperature below the glass transition temperature of the molding compound. Control samples are exposed to a pressurized inert gas under similar or more severe conditions of gas pressure, temperature, and humidity. At least one characteristic common to the test samples and the control samples is measured. A determination is made as to whether there exists at least one significant difference between the at least one measured characteristic of the test samples and the control samples.Type: GrantFiled: September 9, 2003Date of Patent: November 27, 2007Assignee: International Business Machines CorporationInventors: Joseph K. V. Comeau, Adele M. Mahoney, Jason P. Ritter, Gerald J. Scilla, Charles H. Wilson
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Patent number: 6556982Abstract: A data analysis and classification system that reads the electronic information, analyzes the electronic information according to a user-defined set of logical rules, and returns a classification result. The data analysis and classification system may accept any form of computer-readable electronic information. The system creates a hash table wherein each entry of the hash table contains a concept corresponding to a word or phrase which the system has previously encountered. The system creates an object model based on the user-defined logical associations, used for reviewing each concept contained in the electronic information in order to determine whether the electronic information is classified. The data analysis and classification system extracts each concept in turn from the electronic information, locates it in the hash table, and propagates it through the object model.Type: GrantFiled: April 28, 2000Date of Patent: April 29, 2003Assignee: BWXT Y-12, LLCInventors: Robert W. McGaffey, Michael Allen Bell, Peter J. Kortman, Charles H. Wilson
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Patent number: 5546655Abstract: A flex or TAB product suitable for chip carrier applications wherein the flex reliability problems caused by copper dendrite growth and lead bending during power and thermal cycling are reduced by application of special coatings to lead areas of the flex tape.Type: GrantFiled: October 25, 1994Date of Patent: August 20, 1996Assignee: International Business Machines CorporationInventors: Claudius Feger, Teresita O. Graham, Kurt R. Grebe, Alphonso P. Lanzetta, John J. Liutkus, Linda C. Matthew, Michael J. Palmer, Nelson R. Tanner, Ho-Ming Tong, Charles H. Wilson, Helen L. Yeh