Abstract: A circuit board assembly includes a low-frequency (LF) substrate, a monolithic microwave integrated circuit (MMIC), electrical components, a high-frequency (HF) substrate, and an antenna. The LF substrate is formed of FR-4 type material. The LF substrate defines a waveguide through the LF substrate. The MMIC is attached to the top-side of the LF substrate and outputs the radio-frequency signal. The electrical components are electrically attached to the LF substrate. The HF substrate is soldered to the top side of the LF substrate. An opening through the HF substrate surrounds the MMIC. A vertical transition guides the radio-frequency signal output by the MMIC to the waveguide. A plurality of wire bonds electrically connects the MMIC to the HF substrate and couple the radio-frequency signal from the MMIC to the vertical transition. The antenna is attached to the LF substrate and configured to radiate the radio-frequency signal from the waveguide.

Abstract: A microwave communication package is constructed on an electrically conducting base plate having a first side defining a base plate cavity, with an antenna apparatus mounted on an opposite, second side. A dielectric substrate on the first side of the base plate covers the base plate cavity; and sealing apparatus contacting the dielectric substrate and the base plate completely around the base plate cavity hermetically seals the cavity. Circuitry mounted on a surface of the substrate within the base plate cavity includes one or more microstrip lines communicating components to one or more waveguides comprising openings extending through the base plate; and the waveguides are coupled at their opposite ends to the antenna apparatus.

Abstract: A microwave communication package is constructed on an electrically conducting base plate having a first side defining a base plate cavity, with an antenna apparatus mounted on an opposite, second side. A dielectric substrate on the first side of the base plate covers the base plate cavity; and sealing apparatus contacting the dielectric substrate and the base plate completely around the base plate cavity hermetically seals the cavity. Circuitry mounted on a surface of the substrate within the base plate cavity includes one or more microstrip lines communicating components to one or more waveguides comprising openings extending through the base plate; and the waveguides are coupled at their opposite ends to the antenna apparatus.

Abstract: A passive surface mount part such as a capacitor or a resistor is employed to attach a first substrate to a second substrate, or a semiconductor device to a substrate, for an electrical circuit assembly. Applicable forms of substrates include a printed circuit board such as a motherboard and a daughterboard, and applicable forms of semiconductor devices include an integrated circuit. In an aspect, a low profile attachment is provided forming a planar structure. Space is conserved, signal transmission is provided, and electrical performance is increased. In another aspect, a standoff is defined between the substrates setting the substrates apart a desired distance, compensating for any surface irregularities, increasing thermal separation, and increasing interconnect flexibility. As an application, the standoff defined between the substrates can be utilized for a structure such as optical glass structure to be situated between the substrates for use with an optical circuit assembly.

Abstract: Processes for reliably and durably mounting a connector body to a surface of a circuit board without using conventional underfill and overmolding techniques are provided. These processes involve preparation of a self-adhering connector subassembly comprising a connector body and an activatable solid adhesive disposed on a mounting surface of the connector body, positioning of the subassembly on a circuit board, and activation of the adhesive to securely attach the connector body to the circuit board.

Abstract: An electronic module includes a substrate, at least one surface mounted integrated circuit (IC) component and an underfill material. The substrate includes a plurality of electrically conductive traces, formed on at least one surface of the substrate, and the component is electrically coupled to at least one of the conductive traces. The underfill material is positioned between the component and the substrate and provides at least one pedestal that supports the component during encapsulation. The underfill material, when cured, maintains the integrity of the electrical connections between the component and the conductive traces.

Abstract: A method and circuit structure for mounting a leadless IC package to a substrate having a thermal pad on a first surface thereof, a plurality of contact pads surrounding the thermal pad, and one or more plated vias in the thermal pad. The leadless package is attached to the substrate with solder that thermally connects the package to the thermal pad. To prevent solder flow into the plated vias during reflow, a solder mask is provided on the first surface of the substrate, at least a portion of which is deposited on the thermal pad and surrounds the plated vias but does not block the plated vias. The solder mask portion defines a barrier between the solder and the plated vias, but allows for outgassing through the vias during solder reflow.

Abstract: A method and circuit structure for mounting a leadless IC package to a substrate having a thermal pad on a first surface thereof, a plurality of contact pads surrounding the thermal pad, and one or more plated vias in the thermal pad. The leadless package is attached to the substrate with solder that thermally connects the package to the thermal pad. To prevent solder flow into the plated vias during reflow, a solder mask is provided on the first surface of the substrate, at least a portion of which is deposited on the thermal pad and surrounds the plated vias but does not block the plated vias. The solder mask portion defines a barrier between the solder and the plated vias, but allows for outgassing through the vias during solder reflow.

Abstract: A method and assembly for mounting an IC semiconductor device to a substrate using flip chip technology. The assembly generally entails a flip chip having a first surface, an oppositely-disposed second surface, an integrated circuit that includes a vertical device on the first surface, and an electrical contact for the vertical device on the second surface. The flip chip is bonded with first solder connections to a first conductor pattern on a substrate, so that the first solder connections electrically and mechanically connect the flip chip to the substrate. The assembly further includes an electrical contact member that is positioned so that the flip chip is between the contact member and the substrate. The contact member is electrically and mechanically connected to a second conductor pattern on the substrate with second solder connections. A third solder connection electrically and mechanically connects the contact member to the electrical contact on the second surface of the flip chip.