Abstract: A method and apparatus of performing fault tolerance in a fault tolerant computer system comprising: a primary node having a primary node processor; a secondary node having a secondary node processor, each node further comprising a respective memory; a respective checkpoint shim; each of the primary and secondary node further comprising: a respective non-virtual operating system (OS), the non-virtual OS comprising a respective; network driver; storage driver; and checkpoint engine; the method comprising the steps of: acting upon a request from a client by the respective OS of the primary and the secondary node, comparing the result obtained by the OS of the primary node and the secondary node by the network driver of the primary node for similarity, and if the comparison of indicates similarity less than a predetermined amount, the primary node network driver informs the primary node checkpoint engine to begin a checkpoint process.

Abstract: In part, the disclosure relates to a real-time fault tolerant system. The system may include a first computing device, a second computing, and a hardware interconnect. The first computing device may include one or more memory devices, one or more processors, a first network interface operable to receive device data and transmit output data over a time-slot-based bus, wherein the output data is generated from processing device data, and a first real-time checkpoint engine. The second computing device may include similar components or the same components as the first computing device. The hardware interconnect is operable to permit data exchange between the first computing device and the second computing device. Checkpoints may be generated by checkpoint engines during lower-priority communication time slots allocated on the time slot-based bus to avoid interfering with any real-time communications to or from the first and second computing devices.

Abstract: In part, the disclosure relates to a real-time fault tolerant system. The system may include a first computing device, a second computing, and a hardware interconnect. The first computing device may include one or more memory devices, one or more processors, a first network interface operable to receive device data and transmit output data over a time-slot-based bus, wherein the output data is generated from processing device data, and a first real-time checkpoint engine. The second computing device may include similar components or the same components as the first computing device. The hardware interconnect is operable to permit data exchange between the first computing device and the second computing device. Checkpoints may be generated by checkpoint engines during lower-priority communication time slots allocated on the time slot-based bus to avoid interfering with any real-time communications to or from the first and second computing devices.

Abstract: A method and apparatus of performing fault tolerance in a fault tolerant computer system comprising: a primary node having a primary node processor; a secondary node having a secondary node processor, each node further comprising a respective memory; a respective checkpoint shim; each of the primary and secondary node further comprising: a respective non-virtual operating system (OS), the non-virtual OS comprising a respective; network driver; storage driver; and checkpoint engine; the method comprising the steps of: acting upon a request from a client by the respective OS of the primary and the secondary node, comparing the result obtained by the OS of the primary node and the secondary node by the network driver of the primary node for similarity, and if the comparison of indicates similarity less than a predetermined amount, the primary node network driver informs the primary node checkpoint engine to begin a checkpoint process.

Abstract: A method for dynamically-extending a firewall includes a step of receiving an identifier from a remote system. The identifier is used locally to accept packets of information with matching identifiers, rejecting packets whose identifiers do not match.

Abstract: A digital data processing device includes a bus for transmitting signals (e.g., data and/or address information) between plural functional units (e.g., a central processing unit and a peripheral controller). A first such unit includes first and second processing sections that concurrently apply to the bus complementary portions of like information signals (e.g., longwords containing data). A fault detection element reads the resultant signal from the bus and compares it with at least portions of the corresponding signals originally generated by the processing sections themselves. If there is discrepancy, the fault-detector signals a fault, e.g., causing the unit to be taken off-line. By use of a redundant unit, processing can continue for fault-tolerant operation.

Abstract: A console terminal arrangement is disclosed for use in connection with a fault-tolerant computer system including a plurality of processing modules, at least some of the processing modules including an operator input/output interface for receiving operator input from an operator input device and operator display output on an operator display device. The console terminal arrangement facilitates management of all of the processing modules by a single operator from a single location. The arrangement includes a console terminal and a plurality of processing module interfaces interconnected by a network. The console terminal includes an operator input device and an operator display device, and generates operator input messages including processing module management information generated by the operator input device in response to inputs provided by an operator and an address identifying one of the processing modules to be managed by the console terminal.

Abstract: A digital data processing device includes a bus for transmitting signals (e.g., data and/or address information) between plural functional units (e.g., a central processing unit and a peripheral controller). A first such unit includes first and second processing sections that concurrently apply to the bus complementary portions of like information signals (e.g., longwords containing data). A fault detection element reads the resultant signal from the bus and compares it with at least portions of the corresponding signals originally generated by the processing sections themselves. If there is discrepancy, the fault-detector signals a fault, e.g., causing the unit to be taken off-line. By use of a redundant unit, processing can continue for fault-tolerant operation.

Abstract: A bus device (10) the communicates with other bus devices (12, 13) on a communication channel (14) that includes a plurality of duplicated information buses (16, 17) selectively assumes bus-selection states in which it uses information from one or the other of the buses (16, 17). It also monitors the buses (16, 17) for errors in the information that the buses (16, 17) carry, and it broadcasts an error signal over other lines (18) of the communications channel (14) in response to detection of such an error, but only if an error occurs in information on the bus that its current bus-selection state designates. On the other hand, when an error-broadcast signal indicating an error on either bus in the information transmitted by that device (10) appears on the bus, that bus device (10) retransmits the information, regardless of that device's current bus-selection state. Inconsistent operation phasing among bus devices that have assumed different bus-selection states is thereby avoided.

Abstract: A multinodal system is one-way interconnected, two-way interconnected or, more generally, (n)-way interconnected, where (n) is an integer. In a one-way interconnected system, only one connection element couples any two nodes. Or, put another way, only one communication path exists between every node and every other node. A two-way interconnected system, on the other hand, has two connection elements coupling each pair of nodes. Likewise, an (n)-way interconnected system provides (n) independent connection paths between each pair. Such systems are characteristic in that the relationship between the number of independent buses (b), the number of nodes (v), the number of ports (r), and the degree of interconnectedness (n) can be expressed by the equation ##EQU1## Two-way and (n)-way interconnect arrays may be adapted for use in fault-tolerant communications.