Abstract: In one embodiment, a computer-implemented method includes issuing, to a DRAM with EIP, a first group of two or more load requests to load data from a hash table constructed from hashed join-key values of a dimension table for a hash-join procedure. A second group of two or more load requests is issued. First response data is received, responsive to the first group of load requests. The first response data is processed while awaiting second response data responsive to the second group. Processing the first response data includes identifying matches between the join-key values corresponding to entries in the load requests of the first group and one or more hash buckets in the first response data. The size of the second group of load requests is selected such that a time for processing the first response data is approximately equal to the latency in receiving the second response data.

Abstract: In one embodiment, a computer-implemented method includes issuing, to a DRAM with EIP, a first group of two or more load requests to load data from a hash table constructed from hashed join-key values of a dimension table for a hash-join procedure. A second group of two or more load requests is issued. First response data is received, responsive to the first group of load requests. The first response data is processed while awaiting second response data responsive to the second group. Processing the first response data includes identifying matches between the join-key values corresponding to entries in the load requests of the first group and one or more hash buckets in the first response data. The size of the second group of load requests is selected such that a time for processing the first response data is approximately equal to the latency in receiving the second response data.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip, and a heat removal device thermally connected to the thermal interface material pad.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip and nanofibers aligned perpendicular to mating surfaces of the first chip and the second chip.

Abstract: The disclosure describes a method of dynamically creating real-time presentations responsive to search expressions. The method comprises retrieving information from search engines, parsing the retrieved information to create dynamically a structured document including mark-up tags, and rendering the structured document as a slide show presentation of images by a multimedia presentation module. The structured document may be editable, annotatable, storable, and publishable by a user viewing the slide show presentation on the client device. The information retrieved from the one or more search engines may be restricted to one or more specified web domains. Pertinent textual information about the object of interest may also be retrieved along with the image information for convenient review by the user. Each displayed image in the slideshow presentation may have an embedded hyperlink to the source page of the image.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip, and a heat removal device thermally connected to the thermal interface material pad.

Abstract: The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors.

Abstract: A computer implemented method for project management is provided. A project manager creates sub-project data for a sub-project based on project data for a project. The project manager also modifies the project data. A sub-project manager modifies the sub-project data, wherein modification of the sub-project data enables modification of the project data. The project data and the sub-project data are displayed.

Abstract: The exemplary embodiments of the present invention provide a method and apparatus for enhancing the cooling of a chip stack of semiconductor chips. The method includes creating a first chip with circuitry on a first side and creating a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The method further includes creating a cavity in a second side of the first chip between the connectors and filling the cavity with a thermal material. The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes wherein portions of a second side of the first chip between the connectors is removed to provide a cavity in which a thermal material is placed.

Abstract: The exemplary embodiments of the present invention provide a method and apparatus for enhancing the cooling of a chip stack of semiconductor chips. The method includes creating a first chip with circuitry on a first side and creating a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The method further includes creating a cavity in a second side of the first chip between the connectors and filling the cavity with a thermal material. The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes wherein portions of a second side of the first chip between the connectors is removed to provide a cavity in which a thermal material is placed.

Abstract: A closed circuit rebreather including a breathing hose assembly, head assembly and internal counterlung assembly having axial and radial gas flow passageways therethrough, wherein the assembly is housed within a tank and includes a scrubber substantially enclosed along its longitudinal length within a water impervious counterlung bladder, the scrubber including foraminous inner and outer tubes having a carbon dioxide absorbent material filling the space therebetween.

Abstract: A three-dimensional (3D) chip is fabricated from components that have been cut out of a two-dimensional (2D) chip. The components from the 2D chip are layered and coupled to create the layers of the 3D chip. By testing the 2D chip first, the layers of the 3D chip have been pre-tested, thus reducing testing and production costs.

Abstract: A first cache simultaneously broadcasts, in a single message, a request for a cache line and a request to accept a future related evicted cache line to multiple other caches. Each of the multiple other caches evaluate their occupancy to derive an occupancy value that reflects their ability to accept the future related evicted cache line. In response to receiving a requested cache line, the first cache evicts the related evicted cache line to the cache with the highest occupancy value.

Abstract: A circuit arrangement and method in one aspect utilize thermal-only through vias, extending between the opposing faces of stacked semiconductor dies, to increase the thermal conductivity of a multi-layer semiconductor stack. The thermal vias are provided in addition to data-carrying through vias, which communicate data signals between circuit layers, and power-carrying through vias, which are coupled to a power distribution network for the circuit layers, such that the thermal conductivity is increased above that which may be provided by the data-carrying and power-carrying through vias in the stack. A circuit arrangement and method in another aspect organize the circuit layers in a multi-layer semiconductor stack based upon current density so as to reduce power distribution losses in the stack.

Abstract: A mixing syringe and method for using the mixing syringe are provided. The mixing syringe comprises a housing having a first compartment for containing a first component, an outer plunger having a second compartment for containing a second component, and an inner plunger. Prior to use, a seal separates the first and second components. To prepare the mixture, the seal is pierced and the two components are mixed. The mixing syringe and its method of use are particularly suited to applications in which at least one of the mixture components is a relatively highly viscous material.

Abstract: A closed circuit rebreather including a breathing hose assembly, head assembly and internal counterlung assembly having axial and radial gas flow passageways therethrough, wherein the assembly is housed within a tank and includes a scrubber substantially enclosed along its longitudinal length within a water impervious counterlung bladder, the scrubber including foraminous inner and outer tubes having a carbon dioxide absorbent material filling the space therebetween.

Abstract: A broadcast router includes plural input cards, first and second router matrix card and plural output cards. Programmable devices residing on the cards requiring configuration issue a request for configuration to a main controller which resides, with a shared configuration information repository on a configuration control card. After a period of time which allows additional programmable devices to request configuration elapses, the main controller polls the programmable devices residing on the cards to determine which of the programmable devices had requested configuration and, using the configuration information maintained in the shared configuration information repository, configures each programmable device which had requested configuration.

Abstract: A first cache simultaneously broadcasts, in a single message, a request for a cache line and a request to accept a future related evicted cache line to multiple other caches. Each of the multiple other caches evaluate their occupancy to derive an occupancy value that reflects their ability to accept the future related evicted cache line. In response to receiving a requested cache line, the first cache evicts the related evicted cache line to the cache with the highest occupancy value.

Abstract: A three-dimensional (3D) chip is fabricated from components that have been cut out of a two-dimensional (2D) chip to create the layers of the 3D chip. By testing the 2D chip first, the layers of the 3D chip have been pre-tested, thus reducing testing and production costs.

Abstract: A mixing syringe and method for using the mixing syringe are provided. The mixing syringe comprises a housing having a first compartment for containing a first component, an outer plunger having a second compartment for containing a second component, and an inner plunger. Prior to use, a seal separates the first and second components. To prepare the mixture, the seal is pierced and the two components are mixed. The mixing syringe and its method of use are particularly suited to applications in which at least one of the mixture components is a relatively highly viscous material.