Patents by Inventor Charles L. Whittington

Charles L. Whittington has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5590172
    Abstract: A method of transferring a user message-conveying radiotelephone call by a subscriber unit from a first radio coverage area, served by a first fixed control unit which is coupled to a wireline telephone switch, to a second radio coverage area served by a second fixed control unit, includes transmitting a directory number, associated with the first fixed control unit and the wireline telephone switch, the directory number identifying a wireline telephone number of the first fixed control unit, from the first fixed control unit to the subscriber unit; storing the transmitted directory number at the subscriber unit; transmitting the stored directory number from the subscriber unit to the second fixed control unit when a need for transfer of the radiotelephone call to the second fixed control unit from the first fixed control unit is determined; calling the transmitted directory number from the second fixed control unit; in response to the calling of the directory number, connecting the second fixed control unit
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: December 31, 1996
    Assignee: Motorola, Inc.
    Inventors: John P. Lodwig, Kenneth A. Felix, Charles L. Whittington
  • Patent number: 5123014
    Abstract: A method and apparatus for arranging an HDLC data link to transport a special class of data such as, for example, synchronization or other signalling informaiton, in addition to the normal data transported by the data link is provided. According to the invention, at the sending end of the link the all-1's sequence corresponding to the idle sequence between individual HDLC packets is detected. Once eight (8) consecutive 1's are detected, a desired number of 1's is removed and a like number of synchronization bits are inserted in their place. At the receiving end of the link the inserted synchronization bits are detected, removed, and a like number of 1's inserted in their place.
    Type: Grant
    Filed: February 27, 1990
    Date of Patent: June 16, 1992
    Assignee: Motorola, Inc.
    Inventors: John C. Federkins, Charles L. Whittington, Hueiming Yang
  • Patent number: 4918572
    Abstract: Method and apparatus for packaging electronic equipment comprise a housing and a "midplane" that is removably secured to suitable flanges centrally located within the housing. Individual sub-modules (CPU, disk drive, I/O unit, power supply, etc.) have suitable electrical connectors which mate with corresponding connectors on the midplane. The sub-modules are inserted into the midplane from different sides of the housing. The exposed, outer surfaces of the sub-modules may either be finished in final form, or suitable bezels may be placed over the sides of the housing so that the sub-modules can be appropriately accessed for necessary replacement or repair.
    Type: Grant
    Filed: December 27, 1988
    Date of Patent: April 17, 1990
    Assignees: Motorola Computer X, Inc., Emtek Health Care Systems, Inc.
    Inventors: Carl R. Tarver, James G. Lawrence, Charles L. Whittington
  • Patent number: 4719567
    Abstract: A bus master is prevented from utilizing a communication bus during a current sample interval if the utilization rate of the communication bus during the immediately preceeding sample interval exceeded a selected limit.
    Type: Grant
    Filed: April 29, 1982
    Date of Patent: January 12, 1988
    Assignee: Motorola, Inc.
    Inventors: Charles L. Whittington, John Zolnowsky
  • Patent number: 4473878
    Abstract: A memory management unit of use in a memory management system. The memory management unit selectively maps a logical address to a respective physical address in accordance with a selected one of a plurality of segment descriptors, each of which defines a logical-to-physical address mapping and a range of address spaces for which such mapping is valid. The mapping is achieved using an improved associative memory circuit. Means are provided to detect mapping conflicts between new segment descriptors and segment descriptors already stored, and to prevent the storage of such conflicting segment descriptors. A method and circuit are provided to coordinate the parallel operation of a plurality of the memory management units or the like.
    Type: Grant
    Filed: December 14, 1981
    Date of Patent: September 25, 1984
    Assignee: Motorola, Inc.
    Inventors: John E. Zolnowsky, Charles L. Whittington, William M. Keshlear