Abstract: A communication system for a power line is described. A transmission system of the communication system divides the time axis into a number of time slots synchronized such that one time slot can start about a zero crossing of the power line signal. These time slots are referred to as channels and are numbered from 1 to n. A modulation method is described to is narrow band continuous phase FSK, where a number m of modulating frequencies are used, arranged such that an integral number of full cycles fit into each channel time slot for all m frequencies. The system transmits during only a subset of the available time slots (channels) concentrated near the zero crossing of the power line waveform where the noise is typically minimal.

Abstract: A communication system for a power line is described. A transmission system of the communication system divides the time axis into a number of time slots synchronized such that one time slot can start about a zero crossing of the power line signal. These time slots may be referred to as channels. Data may initially be modulated into at least one of these time slots over a first transmission period according to a modulation scheme. The time slots and/or modulation scheme used in subsequent transmission periods may be adjusted depending on transmission feedback relating to prior modulated data.

Abstract: A memory management system provides microcode instructions that are divided into multiple tuned phases and stored as separate modules inside a phase code depository. A microcode manager, containing a mode detector, sequence identifier, code loader, drawing data processor and phase executor, interacts with a microcode processor and the phase code depository. The mode detector evaluates a user request for a desired mode. In response to a command from the mode detector, the sequence identifier selects a correct phase sequence that is needed to implement the desired mode. The code loader transfers the phase sequence from the phase code depository to the microcode processor where it is stored in a microcode instruction memory. The memory address for each module within the phase sequence is written to a microcode data memory.

Abstract: A communication system for a power line is described. A transmission system of the communication system divides the time axis into a number of time slots synchronized such that one time slot can start about a zero crossing of the power line signal. These time slots are referred to as channels and are numbered from 1 to n. A modulation method is described to is narrow band continuous phase FSK, where a number m of modulating frequencies are used, arranged such that an integral number of full cycles fit into each channel time slot for all m frequencies. The system transmits during only a subset of the available time slots (channels) concentrated near the zero crossing of the power line waveform where the noise is typically minimal.

Abstract: A memory management system provides microcode instructions that are divided into multiple tuned phases and stored as separate modules inside a phase code depository. A microcode manager, containing a mode detector, sequence identifier, code loader, drawing data processor and phase executor, interacts with a microcode processor and the phase code depository. The mode detector evaluates a user request for a desired mode. In response to a command from the mode detector, the sequence identifier selects a correct phase sequence that is needed to implement the desired mode. The code loader transfers the phase sequence from the phase code depository to the microcode processor where it is stored in a microcode instruction memory. The memory address for each module within the phase sequence is written to a microcode data memory.

Abstract: A memory management system provides microcode instructions that are divided into multiple tuned phases and stored as separate modules inside a phase code depository. A microcode manager, containing a mode detector, sequence identifier, code loader, drawing data processor and phase executor, interacts with a microcode processor and the phase code depository. The mode detector evaluates a user request for a desired mode. In response to a command from the mode detector, the sequence identifier selects a correct phase sequence that is needed to implement the desired mode. The code loader transfers the phase sequence from the phase code depository to the microcode processor where it is stored in a microcode instruction memory. The memory address for each module within the phase sequence is written to a microcode data memory.