Abstract: Devices, systems, and methods are provided for receiving, by a first device, a first video feed from a first camera at a first televised event the first video feed comprising synthesized content preceding the first televised event, the synthesized content comprising a virtual representation of an object or being; detecting a first delay time between audio and video of the synthesized content in the first video feed; generating, based on the first delay time, video content comprising a first portion of the first video feed; and sending the video content to a second device for presentation of the televised event.

Abstract: A circuit comprises a first pulse-width modulator configured to generate a first pulse based on a first input, a second pulse-width modulator configured to generate a second pulse based on a second input, a first differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor, and a second differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor. A gate of the first transistor of the first differential circuit and a gate of the second transistor of the first differential circuit, and a gate of the first transistor of the second differential circuit and a gate of the second transistor of the second differential circuit are configured to be controlled by the first and second pulse width modulators based on the first input and the second input.

Abstract: A circuit comprises a first pulse-width modulator configured to generate a first pulse based on a first input, a second pulse-width modulator configured to generate a second pulse based on a second input, a first differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor, and a second differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor. A gate of the first transistor of the first differential circuit and a gate of the second transistor of the first differential circuit, and a gate of the first transistor of the second differential circuit and a gate of the second transistor of the second differential circuit are configured to be controlled by the first and second pulse width modulators based on the first input and the second input.

Abstract: A system can compensate for activation drift in analog memory-based artificial neural networks. A set of input activation vectors can be input, at a first point in time, to a crossbar array. The first set of output activation vectors can be read from the output lines of the crossbar array. At a second point in time, which is a later time than the first point in time, the input set of activation vectors can be input to the crossbar array. A second set of output activation vectors can be read from the crossbar array. A function that maps the second set of output activation vectors to the first set of output activation vectors can be determined. The function can be applied to subsequent output activation vectors output by the crossbar array. A method thereof, can also be provided.

Abstract: A method for preparing a trained crossbar array of a neural network is provided. The method includes feeding an input portion of a predetermined truth table into a computer simulation of a crossbar array, and generating analog output values for the input portion of the truth table based on simulated weights. The method further includes calculating a loss value from each of the analog output values and expected values for an output portion of the truth table, and adjusting the simulated weights based on the calculated loss values. The method further includes refeeding the input portion of the predetermined truth table into the computer simulation and recalculating the output values using the adjusted simulated weights until the analog output values produce the expected values for the output portion of the truth table within a predefined margin of error.

Abstract: Translation of artificial neural network (ANN) software weights to analog conductances in the presence of conductance non-idealities for deployment to an analog non-volatile memory device is provided. A plurality of target synaptic weights of an artificial neural network is read. The plurality of target synaptic weights is mapped to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values. A hardware model is applied to the plurality of conductance values, thereby determining a plurality of hardware-adjusted conductance values, the hardware model corresponding to an analog non-volatile memory device. The plurality of hardware-adjusted conductance values is mapped to a plurality of hardware-adjusted synaptic weights. The plurality of conductance values is optimized in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights.

Abstract: Techniques are provided for learning static bound management parameters for an analog resistive processing unit system which is configured for neuromorphic computing. For example, a system comprises one or more processors which are configured to: perform a first training process to train a first artificial neural network model; perform a second training process to retrain the first artificial neural network model using matrix-vector compute operations which are a function of bound management parameters of an analog resistive processing unit system, to thereby generate a second artificial neural network model with learned static bound management parameters; and configure the resistive processing unit system to implement the second artificial neural network model and the learned static bound management parameters.

Abstract: Embodiments herein disclose computer-implemented methods, computer program products and computer systems for balancing neural network weight asymmetries. The computer-implemented method may include providing a neural network with weights comprising one or more major conductance pairs and one or more minor conductance pairs. The method may further include programming the one or more major conductance pairs to force an inference output to an expected duration value, determining a positive weight coefficient based on the one or more major conductance pairs and a negative weight coefficient based on the one or more minor conductance pairs, determining one or more target weights based on one or more of the positive weight coefficient and the negative weight coefficient, programming the one or more minor conductance pairs to force the inference output to the expected duration value, and programming the one or more major conductance pairs with the one or more target weights.

Abstract: A system includes a processor, and a resistive processing resistive processing unit coupled to the processor. The resistive processing unit includes an array of cells, wherein the cells respectively include resistive devices, wherein at least a portion of the resistive devices are programmable to store weight values of a given matrix in the array of cells. When the given matrix is stored in the array of cells, the processor is configured to perform a weight extraction process. The weight extraction process applies a set of input vectors to the resistive processing unit to perform analog matrix-vector multiplication operations on the stored matrix, obtains a set of output vectors resulting from the analog matrix-vector multiplication operations, and determines weight values of the given matrix stored in the array of cells utilizing the set of input vectors and the set of output vectors.

Abstract: Distributing multiply-accumulate currents across segment mirrors by providing a circuit including an array of resistive elements, the array including rows and columns and first stage current mirrors, each of the first stage current mirrors being electrically coupled to a segment, wherein the segment comprises a columnar subset of the resistive elements, providing, by the array, a vector of current outputs equal to an analog vector-matrix product between a vector of voltage inputs to the array and a matrix of analog resistive weights within the array, wherein the voltage inputs encode a vector of analog input values, wherein each row of resistive elements corresponds to a specific voltage input, determining a score for each of the rows, determining a ranking of the rows of the array according to the score of each row, and mapping each row to a segment according to the ranking.

Abstract: A computer implemented method includes updating weight values associated with a plurality of analog synapses in a cross-bar array that implements an artificial neural network by sending a pulse sequence to the analog synapses. Each analog synapse includes a conductance unit, wherein a weight value of the analog synapse is based on a conductance value of the conductance unit. The pulse sequence changes the conductance value. The method further includes comparing the weight values of the analog synapses with target weight values associated with the analog synapses and selecting a set of analog synapses based on the comparison. The method further includes updating the weight values of the selected analog synapses by sending a set of electric pulses of varying durations.

Abstract: Distributing multiply-accumulate currents across segment mirrors by providing a circuit including an array of resistive elements, the array including rows and columns and first stage current mirrors, each of the first stage current mirrors being electrically coupled to a segment, wherein the segment comprises a columnar subset of the resistive elements, providing, by the array, a vector of current outputs equal to an analog vector-matrix product between a vector of voltage inputs to the array and a matrix of analog resistive weights within the array, wherein the voltage inputs encode a vector of analog input values, wherein each row of resistive elements corresponds to a specific voltage input, determining a score for each of the rows, determining a ranking of the rows of the array according to the score of each row, and mapping each row to a segment according to the ranking.

Abstract: A computer implemented method includes updating weight values associated with a plurality of analog synapses in a cross-bar array that implements an artificial neural network by sending a pulse sequence to the analog synapses. Each analog synapse includes a conductance unit, wherein a weight value of the analog synapse is based on a conductance value of the conductance unit. The pulse sequence changes the conductance value. The method further includes comparing the weight values of the analog synapses with target weight values associated with the analog synapses and selecting a set of analog synapses based on the comparison. The method further includes updating the weight values of the selected analog synapses by sending a set of electric pulses of varying durations.