Abstract: A rotor assembly for an electric generator, comprising a rotor element, conductive rotor windings and a plurality of rotor slot wedges. The rotor element comprises rotor teeth and rotor slots. At least a first rotor slot wedge is in a first rotor slot and has a shape that encompasses a rectangular prismatic shape and first and second protrusions. At least a first edge on an end surface of at least a first rotor slot wedge has a degree of smoothness as specified herein, and/or is radiused (as defined herein). Also, methods of refurbishing an electric generator, comprising radiusing at least a portion of at least one edge of a wedge. Also, removing a wedge from rotor element, radiusing at least one edge of the wedge, and inserting the wedge into a rotor element.

Abstract: A technique for operating a data processing system includes determining, by an arbiter of a processing unit of the data processing system, whether an over-commit has occurred. In response to determining that the over-commit has occurred, the arbiter selects a broadcast command to be dropped based on a number of hops traversed through the data processing system by the broadcast command.

Abstract: A technique for operating a data processing system includes detecting that a processing unit within a first group of processing units in the data processing system has a hang condition. In response to detecting that the processing unit has a hang condition, a command issue rate for the first group of processing units is reduced. One or more other groups of processing units in the data processing system are notified that the first group of processing units has reduced the command issue rate for the first group of processing units. In response to the notifying, respective command issue rates of the other groups of processing units are reduced to reduce a number of commands received by the first group of processing units from the other groups of processing units.

Abstract: A rotor assembly for an electric generator, comprising a rotor element, conductive rotor windings and a plurality of rotor slot wedges. The rotor element comprises rotor teeth and rotor slots. At least a first rotor slot wedge is in a first rotor slot and has a shape that encompasses a rectangular prismatic shape and first and second protrusions. At least a first edge on an end surface of at least a first rotor slot wedge has a degree of smoothness as specified herein, and/or is radiused (as defined herein). Also, methods of refurbishing an electric generator, comprising radiusing at least a portion of at least one edge of a wedge. Also, removing a wedge from rotor element, radiusing at least one edge of the wedge, and inserting the wedge into a rotor element.

Abstract: A technique for operating a data processing system includes detecting that a processing unit within a first group of processing units in the data processing system has a hang condition. In response to detecting that the processing unit has a hang condition, a command issue rate for the first group of processing units is reduced. One or more other groups of processing units in the data processing system are notified that the first group of processing units has reduced the command issue rate for the first group of processing units. In response to the notifying, respective command issue rates of the other groups of processing units are reduced to reduce a number of commands received by the first group of processing units from the other groups of processing units.

Abstract: A technique for operating a data processing system includes determining, by an arbiter of a processing unit of the data processing system, whether an over-commit has occurred. In response to determining that the over-commit has occurred, the arbiter selects a broadcast command to be dropped based on a number of hops traversed through the data processing system by the broadcast command.

Abstract: A method of maintaining a high voltage bushing can comprise inspecting a high voltage bushing connection, the high voltage bushing connection comprising a tubular lead, a lower stud connector, and the high voltage bushing. A method of maintaining a high voltage bushing can also comprise restoring the high voltage bushing connection, which can further comprise applying conductive material to at least one of a mating portion of a tubular lead and a mating portion of a high voltage bushing, machining an outside diameter of at least one of the mating portion or the tubular lead and the mating portion of the high voltage bushing to a predetermined outer diameter, and machining a mating portion of a lower stud connector to a predetermined inner diameter. A high voltage bushing connection can comprise a restored mating portion of a tubular connector and a restored lower stud connector.

Abstract: An integrated circuit system including a first integrated circuit chip including first logic, a second integrated circuit chip, and second logic distributed across the first and second integrated circuit chips. The second logic includes a first unit integrated in the first integrated circuit chip and a second unit integrated in the second integrated circuit chip. The integrated circuit system further includes a physical communication link coupling the first unit in the first integrated circuit chip and the second unit in the second integrated circuit chip and a request interface between the first logic and first unit of the second logic. The request interface is implemented in the first integrated circuit such that communication via the request interface between the first logic and the first unit of the second logic has low latency and such that the request interface is decoupled from the physical communication link.

Abstract: A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request from an attached processor (AP) and an expected coherence state of a target address of the memory access request with respect to a cache memory of the AP. In response, the CAPP determines a coherence state of the target address and whether or not the expected state matches the determined coherence state. In response to determining that the expected state matches the determined coherence state, the CAPP issues a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system. In response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.

Abstract: A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request from an attached processor (AP) and an expected coherence state of a target address of the memory access request with respect to a cache memory of the AP. In response, the CAPP determines a coherence state of the target address and whether or not the expected state matches the determined coherence state. In response to determining that the expected state matches the determined coherence state, the CAPP issues a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system. In response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.

Abstract: A method of maintaining a high voltage bushing can comprise inspecting a high voltage bushing connection, the high voltage bushing connection comprising a tubular lead, a lower stud connector, and the high voltage bushing. A method of maintaining a high voltage bushing can also comprise restoring the high voltage bushing connection, which can further comprise applying conductive material to at least one of a mating portion of a tubular lead and a mating portion of a high voltage bushing, machining an outside diameter of at least one of the mating portion or the tubular lead and the mating portion of the high voltage bushing to a predetermined outer diameter, and machining a mating portion of a lower stud connector to a predetermined inner diameter. A high voltage bushing connection can comprise a restored mating portion of a tubular connector and a restored lower stud connector.

Abstract: An integrated circuit system including a first integrated circuit chip including first logic, a second integrated circuit chip, and second logic distributed across the first and second integrated circuit chips. The second logic includes a first unit integrated in the first integrated circuit chip and a second unit integrated in the second integrated circuit chip. The integrated circuit system further includes a physical communication link coupling the first unit in the first integrated circuit chip and the second unit in the second integrated circuit chip and a request interface between the first logic and first unit of the second logic. The request interface is implemented in the first integrated circuit such that communication via the request interface between the first logic and the first unit of the second logic has low latency and such that the request interface is decoupled from the physical communication link.

Abstract: A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request from an attached processor (AP) and an expected coherence state of a target address of the memory access request with respect to a cache memory of the AP. In response, the CAPP determines a coherence state of the target address and whether or not the expected state matches the determined coherence state. In response to determining that the expected state matches the determined coherence state, the CAPP issues a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system. In response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.

Abstract: A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request from an attached processor (AP) and an expected coherence state of a target address of the memory access request with respect to a cache memory of the AP. In response, the CAPP determines a coherence state of the target address and whether or not the expected state matches the determined coherence state. In response to determining that the expected state matches the determined coherence state, the CAPP issues a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system. In response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.

Abstract: A high voltage bushing and flange with an interior seal. The high voltage bushing includes an outer insulating material. The high voltage bushing includes a flange with an interior seal comprised of at least two flange O-ring channels; at least two O-rings; a sealant channel; and a quantity of sealant filling the sealant channel.

Abstract: A high voltage bushing and flange with an interior seal. The high voltage bushing includes an outer insulating material. The high voltage bushing includes a flange with an interior seal comprised of at least two flange O-ring channels; at least two O-rings; a sealant channel; and a quantity of sealant filling the sealant channel.

Abstract: A method for testing a generator including a plurality of phase groups is provided. The method includes electrically isolating a first phase group from remaining phase groups by substantially encapsulating at least a portion of a plurality of stator bars electrically coupled together within the first phase group with an insulative member, electrically grounding at least a second phase group, and inducing a high voltage to the first phase group to facilitate proof testing the first phase group.

Abstract: A method for testing a generator including a plurality of phase groups is provided. The method includes electrically isolating a first phase group from remaining phase groups by substantially encapsulating at least a portion of a plurality of stator bars electrically coupled together within the first phase group with an insulative member, electrically grounding at least a second phase group, and inducing a high voltage to the first phase group to facilitate proof testing the first phase group.

Abstract: Electronic shelf label (ESL) carriers including an attachment member to be secured to a supporting surface such as a C-channel, a holder member with tabs for removably receiving and supporting the ESLs, and a cover member pivotally carried by the top or the bottom of the holder member to overly and protect the ESLs. The attachment member and the holder member include interengageable complementary adjustment elements to enable the ESLs to be displayed at a zero angle or a positive or negative angular orientation relative to the supporting surface. In one embodiment, the attachment member has a pair of forwardly extending legs each of which include a pair of spaced cavities, with the holder member including upper and lower elements with complementary protrusions which can be selectively engaged in the cavities to adjust the viewing angle.

Abstract: An apparatus, circuit arrangement, program product and method of scaling an image horizontally partition a source image into a plurality of partitions, with each partition having a width that is no greater than the width of a line buffer used to scale the image. By partitioning an image into a plurality of partitions, the overall width of the scaled image is not constrained by the width of the line buffer. As a result, in many instances line buffers that are significantly smaller than conventional full-width line buffers may be used to generate scaled images that are substantially wider than may be generated by conventional buffers. Moreover, when implemented in hardware, the line buffers typically occupy significantly less real estate on an integrated circuit, thus reducing both cost and power consumption.