Abstract: An integrated circuit includes a lower and upper device portions including bodies of semiconductor material extending horizontally between first source and drain regions in a spaced-apart vertical stack. A first gate structure is around a body in the lower device portion and includes a first gate electrode and a first gate dielectric. A second gate structure is around a body in the upper device portion and includes a second gate electrode and a second gate dielectric, where the first gate dielectric is compositionally distinct from the second gate dielectric. In some embodiments, a dipole species has a first concentration in the first gate dielectric and a different second concentration in the second gate dielectric. A method of fabrication is also disclosed.

Abstract: Thin film transistors having multi-layer gate dielectric structures integrated with two-dimensional (2D) channel materials are described. In an example, an integrated circuit structure includes a two-dimensional (2D) material layer above a substrate. A gate stack is over the 2D material layer, the gate stack having a first side opposite a second side, and the gate stack having a gate electrode around a gate dielectric structure. A first gate spacer is on the 2D material layer and adjacent to the first side of the gate stack. A second gate spacer is on the 2D material layer and adjacent to the second side of the gate stack, wherein the first gate spacer and the second gate spacer are continuous with a layer of the gate dielectric structure. A first conductive structure is coupled to the 2D material layer and adjacent to the first gate spacer. A second conductive structure is coupled to the 2D material layer and adjacent to the second gate spacer.

Abstract: Thin film transistors having a spin-on two-dimensional (2D) channel material are described. In an example, an integrated circuit structure includes a first device layer including a first two-dimensional (2D) material layer above a substrate. The first 2D material layer includes molybdenum, sulfur, sodium and carbon. A second device layer including a second 2D material layer is above the substrate. The second 2D material layer includes tungsten, selenium, sodium and carbon.

Abstract: Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or hafnate) in close proximity to the channel region, thereby altering the dipole properties of the gate insulator material. Different channels of a transistor stack may be exposed to differing amounts or types of the metal oxide species to provide a range of Vt within the stack. After diffusion, the metal oxide may be stripped as sacrificial, or retained.