Abstract: A system for concurrent target diagnostics is disclosed. The system comprises dedicated FPGA for generating test data to test target connections between an emulator and a target system. In this way, domains of the emulator may continue to emulate at least a portion of a hardware design during the testing of the target connections. Further, a multiplexer operable to select target connections for testing eliminates errors resulting from manual swapping of target connections during the testing process. The system further comprises multiple paths to a target pod. The paths enable monitoring and reporting on the status of target connections between an emulator and a target system.

Abstract: Methods and systems for concurrent diagnostics in a functional verification system are disclosed and claimed herein. The methods and systems enable testing the interconnections of a functional verification system while the system implements a hardware design. In one embodiment, a first emulation chip of the functional verification system generates an encoded data word comprising a data word and error correction code (ECC) check bits. The ECC check bits enable a second emulation chip receiving the encoded word to determine whether the data word was received without error. In another embodiment, test patters may be transmitted along the unused interconnections while the functional verification system implements a hardware design in other interconnections. In another embodiment, a dedicated pattern generator generates test patterns to transmit across the interconnection.

Abstract: A system for concurrent target diagnostics is disclosed. The system comprises dedicated FPGA for generating test data to test target connections between an emulator and a target system. In this way, domains of the emulator may continue to emulate at least a portion of a hardware design during the testing of the target connections. Further, a multiplexer operable to select target connections for testing eliminates errors resulting from manual swapping of target connections during the testing process. The system further comprises multiple paths to a target pod. The paths enable monitoring and reporting on the status of target connections between an emulator and a target system.

Abstract: A shared fixed block architecture direct access storage system and method for use with a plurality of computer systems is described. The storage system includes a shared fixed block architecture direct access storage device with a plurality of shared files. A shared fixed block architecture control unit is coupled to the shared fixed block architecture direct access storage device and to the plurality of computer systems. The shared fixed block architecture control unit also includes a data unit responsible for moving data between a shared fixed block architecture direct access storage device in the computer systems, a SETL unit responsible for processing access requests and for creating control files corresponding to each shared file, and a heart beat unit responsible for updating the control files.

Abstract: A shared fixed block architecture direct access storage system and method for use with a plurality of computer systems is described. The storage system includes a shared fixed block architecture direct access storage device with a plurality of shared files. A shared fixed block architecture control unit is coupled to the shared fixed block architecture direct access storage device and to the plurality of computer systems. The shared fixed block architecture control unit also includes a data unit responsible for moving data between a shared fixed block architecture direct access storage device in the computer systems, a SETL unit responsible for processing access requests and for creating control files corresponding to each shared file, and a heart beat unit responsible for updating the control files.