Abstract: An improved method of making an airfoil includes stacking plies in two groups. A separator ply is positioned between the two groups of plies. The groups of plies and the separator ply are interconnected to form an airfoil blank. The airfoil blank is shaped, by forging or other methods, to have a desired configuration. The material of the separator ply is then dissolved or otherwise removed from between the two sections of the airfoil blank to provide access to the interior of the airfoil blank. Material is removed from inner sides of the two separated sections to form core receiving cavities. After cores have been placed in the cavities, the two sections of the airfoil blank are interconnected and the shaping of the airfoil is completed. The cores are subsequently removed from the completed airfoil.

Abstract: This relates to the scribing and breaking of a semiconductor wafer into individual dies by anodizing the silicon in regions corresponding to the die boundaries. The regions are selectively anodized, and the anodization is continued until the anodized silicon extends into the semiconductor wafer to a depth that allows easy breakage when the wafer is stressed. To facilitate breakage, the anodized silicon may be removed with hydrofluoric acid.

Abstract: An integrated circuit having dielectric isolation is fabricated by growing a double epitaxial layer of N-type semiconductive material onto a P-type substrate. A dielectric layer is formed over the epitaxial layer and thereafter the dielectric and the epitaxial growth are removed in selected isolation regions to expose the substrate. A metal layer is evaporated onto the device so that metal is deposited both on the exposed substrate material and on the dielectric layer. A dielectric is formed by selectively anodizing the metal deposited on the exposed substrate to provide electrical isolation between the remaining portions of the epitaxial growth. Because of the electrical insulating characteristics of the dielectric layer, the metal deposited on the dielectric layer is not anodized and may be removed using a compound that attacks the unanodized metal and has little effect on the anodized metal. Base and emitter elements are formed in the conventional manner to complete the integrated circuit.

Abstract: An integrated circuit having dielectric isolation is fabricated by growing a double epitaxial layer of N-type semiconductive material onto a P-type substrate. A dielectric layer is formed over the epitaxial layer and thereafter the dielectric and a portion of the epitaxial growth are removed in selected isolation regions to expose the semiconductive material. A dielectric is formed by anodizing the N-type semiconductive material in the selected isolation regions to provide electrical isolation between the remaining portions of the epitaxial growth. Base and emitter elements are formed in the conventional manner to complete the integrated circuit which is thereafter packaged.

Abstract: A self-aligning integrated circuit package includes an integrated circuit die having raised contact pads mounted to an interconnecting die in flip chip fashion. The interconnecting die is formed of anodizable material and has raised anodized portions that form guide means for aligning the integrated circuit die and the leads of a lead frame so that they are positioned over conductive portions of the interconnecting die which connect the contact pads of the integrated circuit to the leads of the lead frame.

Abstract: An integrated circuit having dielectric isolation is fabricated by growing a double epitaxial layer of N-type semiconductive material onto a P-type substrate. A dielectric layer is formed over the epitaxial layer and thereafter the dielectric and the epitaxial growth are removed in selected isolation regions to expose the substrate. A metal layer is evaporated onto the device so that metal is deposited both on the exposed substrate material and on the dielectric layer. A dielectric is formed by selectively anodizing the metal deposited on the exposed substrate to provide electrical isolation between the remaining portions of the epitaxial growth. Because of the electrical insulating characteristics of the dielectric layer, the metal deposited on the dielectric layer is not anodized and may be removed using a compound that attacks the unanodized metal and has little effect on the anodized metal. Base and emitter elements are formed in the conventional manner to complete the integrated circuit.