Abstract: An instantaneous frequency measurement (IFM) receiver includes a receiver module for determining a frequency fe of a received signal. Also included is a discrete Fourier transform (DFT) module configured to sum values of digital samples of data in a block of data, wherein the values of the digital samples of data are based on the frequency fe. A confirmation module confirms the frequency fe, if the sum has a value greater than a predetermined threshold. The DFT module is configured to obtain the sum of N-sample points of data which are disposed in the block of data by using a DFT kernel function.

Abstract: A system and method for classifying radar emitters includes: (a) receiving a plurality of signals from the radar emitters; (b) generating data components for each signal received from the radar emitters; (c) forming multi-dimensional samples using the generated data components; and (d) sorting the multi-dimensional samples into a plurality of data clusters, based on their respective proximity to the data clusters, each data cluster representing a classification of a radar emitter.

Abstract: A system in which mass quantities of liquids may be stored in a substantially frozen state, portions thawed for dispensing, and any undispensed thawed portions rechilled for further storage is disclosed. The system includes a tank with a substantially bell-shaped, or flared, interior, the flaring of the tank surface combining with force of gravity to detach frozen material for dispensing. Separate temperature control sections allow selected areas of the tank to be heated or cooled as necessary, moreover, and distinct reservoirs of heat-transfer liquid (such as glycol) may be used for heating versus cooling the tank.

Abstract: The present invention hybrid instantaneous frequency measurement (IFM) compressive receiver processes a wide bandwidth of incoming signals in two processing channels, where a small time delay is introduced to one of the two channels by a time delay stage. A comb generator provides for folding, or collapsing this wide input band into a much narrower bandwidth by overlapping sub-bands of the input band in the same frequency space. A compressive receiver is coupled to the spectrum folding circuitry for accurately measuring the frequency and amplitude of signals in this folded band, which have a sub-band ambiguity due to the folding. Logic circuitry is included for resolving the sub-band ambiguity in order to provide a unique description of the frequencies of input signals in the wide band input frequency range. The hybrid receiver overcomes the limitations of conventional IFM receivers by providing amplitude as well as frequency information for multiple time overlapped input signals with improved sensitivity.

Abstract: There is described a zero IF receiver which affords to reduce offsets normally associated with quadrature mixers employed in such receivers. In order to reduce the effect of such offsets the local oscillator signal is modulated with a balanced pseudo-random phase code signal. This signal is then stripped off by means of additional mixers, one for each of the quadrature channels. The effect of the pseudo-random phase code signal is to spread the spectrum which is associated with the offsets so that the receiver can now respond to desired signals with a minimum of interference.

Abstract: This relates to a signal processor which accepts the linear sum of several continuous (CW) direct sequence, spread spectrum signals, and outputs a sequence of narrow pulses, each of which contains all the available energy of one of the input signals. The CW signals are applied to the input of a tapped delay line, the contents of which are compared, in a parallel fashion, with the output of a code storage register. When correlation has been achieved, a narrow pulse is produced which contains all the available energy of one of the input signals. The circuit reduces the problem of continuously processing several simultaneous signals, conventionally performed with dedicated circuitry for each signal, to a sequential pulse processing operation, effectively timesharing the same single set of circuitry. Both amplitude and phase information is preserved through the processing technique allowing implementation in coherent and non-coherent system architectures.

Abstract: The code generator of the present invention uses digital memories to replace the linear feedback shift registers of the prior art. Each memory contains the time ordered bit sequence for each of the component codes which in general, make up the overall, longer code. Since the entire bit sequences of the component codes are immediately available in the memories by appropriate addressing, the code generator can be initialized to an arbitrary, but defined code state within the response time of the memory element. As an additional benefit, at the option of the designer, the digital memory can be chosen to extract code segments, for example, 8 bits wide rather than single bits, and this parallel approach reduces code clocking speed through much of the code generator hardware, and/or may permit several code patterns for multichannel applications to be constructed using the same common memories.