Patents by Inventor Charles Robert LOTTES

Charles Robert LOTTES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10832938
    Abstract: Systems and methods for processing semiconductor structures are provided. The methods generally include determining a desired removal map profile for a device layer of a semiconductor structure, determining a set of process parameters for use in an epitaxial smoothing process based on the desired removal map profile, and selectively removing material from the device layer by performing an epitaxial smoothing process on an outer surface of the device layer.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: November 10, 2020
    Assignee: GlobalWafers Co., Ltd.
    Inventor: Charles Robert Lottes
  • Publication number: 20190279895
    Abstract: Systems and methods for processing semiconductor structures are provided. The methods generally include determining a desired removal map profile for a device layer of a semiconductor structure, determining a set of process parameters for use in an epitaxial smoothing process based on the desired removal map profile, and selectively removing material from the device layer by performing an epitaxial smoothing process on an outer surface of the device layer.
    Type: Application
    Filed: May 29, 2019
    Publication date: September 12, 2019
    Inventor: Charles Robert Lottes
  • Patent number: 10332781
    Abstract: Systems and methods for processing semiconductor structures are provided. The methods generally include determining a desired removal map profile for a device layer of a semiconductor structure, determining a set of process parameters for use in an epitaxial smoothing process based on the desired removal map profile, and selectively removing material from the device layer by performing an epitaxial smoothing process on an outer surface of the device layer.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: June 25, 2019
    Assignee: GlobalWafers Co., Ltd.
    Inventor: Charles Robert Lottes
  • Publication number: 20180277423
    Abstract: Systems and methods for processing semiconductor structures are provided. The methods generally include determining a desired removal map profile for a device layer of a semiconductor structure, determining a set of process parameters for use in an epitaxial smoothing process based on the desired removal map profile, and selectively removing material from the device layer by performing an epitaxial smoothing process on an outer surface of the device layer.
    Type: Application
    Filed: December 18, 2015
    Publication date: September 27, 2018
    Inventor: Charles Robert LOTTES