Abstract: A monitoring system includes at least one partial discharge (PD) sensor. The PD sensor is configured to monitor a component of an aircraft wiring system and to acquire a monitoring signal. A method embodiment for monitoring an aircraft wiring system includes acquiring a number of monitoring signals for a number of components of the aircraft wiring system using a number of partial discharge PD sensors. The method further includes conveying the monitoring signals from at least one of the PD sensors to a data acquisition system.

Abstract: A monitoring system includes at least one partial discharge (PD) sensor. The PD sensor is configured to monitor a component of an aircraft wiring system and to acquire a monitoring signal. A method embodiment for monitoring an aircraft wiring system includes acquiring a number of monitoring signals for a number of components of the aircraft wiring system using a number of partial discharge PD sensors. The method further includes conveying the monitoring signals from at least one of the PD sensors to a data acquisition system.

Abstract: A high frequency, high density, low profile magnetic circuit component includes a magnetic core having a first magnetic layer and a second magnetic layer with a conductive layer deposited therebetween, each magnetic layer being a multilayer structure comprised of alternating magnetic and insulating films. The magnetic films are anisotropic and are driven along their magnetic hard axis in order to reduce excess eddy current losses. To reduce fringing field eddy current losses, a distributed air gap is structured in the magnetic layers. The magnetic core has a distributed air gap formed therein in order to minimize eddy current losses in the conductive layer. The conductive layer has a conductive material patterned on a insulating substrate and is situated between the first and second magnetic layers such that the conductive material extends beyond the peripheries of the first and second magnetic layers, thereby maximizing the amount of magnetic material that is driven in the hard axis.

Abstract: Power semiconductor device structures and assemblies with improved heat dissipation characteristics and low impedance interconnections include a thermally-conductive dielectric layer, such as diamondlike carbon (DLC) overlying at least portions of the active major surface of a semiconductor chip, with vias formed in the dielectric layer in alignment with contact pads on the active major surface. A patterned metallization layer is formed over the thermally-conductive dielectric layer, with portions of the metallization layer extending through the vias into electrical contact with the chip contact pads. A metal structure is electrically and thermally coupled to selected areas of the patterned metallization, such as by solder bonding or by a eutectic bonding process. In different embodiments, the metal structure may comprise a metal conductor bonded to the opposite major surface of another power semiconductor device structure, a heat-dissipating device-mounting structure, or simply a low-impedance lead.

Abstract: A magnetic or electromagnetic circuit component includes an embedded magnetic material (e.g., ferromagnetic) in an HDI structure with alternating dielectric and metal or winding layers. In one embodiment, the ferromagnetic material is situated in a substrate well, or cavity, with or without an adhesive. Alternatively, the ferromagnetic material is co-fired with the ceramic substrate and then machined to achieve a required core shape. An electroplating process is employed to construct the metal layers, such process including differential plating for varying the thickness of metal layers and/or other portions of the circuit. Laser ablation or any other suitable technique is employed to make through-holes for insertion of the posts of a ferromagnetic core plate used to complete a magnetic circuit, if required. Advantageously, a magnetic or electromagnetic component may have a height of less than about 0.1 inch.

Abstract: By employing High Density Interconnect (HDI) multi-chip modules (MCMs) having elements of a distributed power supply embedded in the MCM itself, the functions of an MCM and a power converter are combined. The embedded power supply elements include DC-DC or AC-DC converters to convert an input voltage and input current to a relatively lower output voltage and relatively higher output current, thereby decreasing the current requirements of external power supply lines connected to the multi-chip module. The current and voltage outputs may be connected to chip power inputs through relatively short, low-impedance power distribution conductors comprising copper strips direct bonded to a ceramic substrate; alternatively, or in combination with direct bonded copper conductors, the low-impedance power distribution conductors may be situated within an HDI overcoat structure. The power supply elements may be placed within cavities formed in the substrate, or on a thinner portion of the substrate.

Abstract: An inductor uses high temperature superconductors in order to obtain high Q for high frequency operation. The superconductors are applied as thin films to substrates. In some embodiments, superconductor thin films are applied to opposite sides of the same substrate. Superconductive thin films are applied outside the magnetic field establishing superconductive thin films in order to shield against leakage of the magnetic field beyond the inductor. The inductor is connected to a capacitor to realize a resonant circuit used in a power conversion system.

Abstract: A multi-cellular power field effect semiconductor device has compact cells including a heavily doped portion of a body region which is self-aligned with respect to an aperture in the gate electrode. The intercept of this heavily doped portion of the body region with the upper surface of the device may also be self-aligned with respect to the aperture and the gate electrode. A method of producing the device is also disclosed.

Abstract: A multi-cellular power field effect semiconductor device has compact cells including a heavily doped portion of a body region which is self-aligned with respect to an aperture in the gate electrode. The intercept of this heavily doped portion of the body region with the upper surface of the device may also be self-aligned with respect to the aperture and the gate electrode. A method of producing the device is also disclosed.

Abstract: A voltage-doubler rectifier includes an ac fullbridge diode rectifier and a dc-to-dc converter having two output boost circuits. One of the output boost circuits is coupled between the rectifier and a dc link, and the other output boost circuit is coupled, with opposite polarity, between the rectifier and the circuit common. Two series-connected filter capacitors are also coupled between the dc link and the circuit common. In a preferred embodiment, the two output boost circuits each comprise either a series, parallel, or combination series/parallel resonant circuit and a rectifier. A switch is coupled between the junction joining one pair of diodes of the rectifier and the junction joining the two filter capacitors. For a relatively high ac line voltage, the switch is open, and the circuit operates in a low boost mode. For a relatively low ac line voltage, the switch is closed, and the circuit operates in a high boost, or voltage-doubling, mode.

Abstract: A semiconductor power switching device comprises a multicellular FET structure with a Schottky barrier diode structure interspersed therewith with at least some of the FET cells being free of Schottky barrier portions. The ratio of Schottky barrier contact area to FET cell area in the overall device may be adjusted to tailor the device for operation at specific current densities.

Abstract: A package for a two-switching-device half bridge circuit comprises an insulating substrate having first, second and third external power terminals along with control terminals bonded to the substrate. The power terminals are configured to provide a straight-through-the package current path from the first external power terminal to the second or common external power terminal and from the second or common external power terminal to the third external power terminal. The control terminals are preferably Kelvin terminal pairs in order to minimize feedback from the power current paths to the control circuits. The power devices are preferably bonded to the first external power terminal and the second external power terminal, respectively, with their connections respectively to the second power terminal and third power terminal substantially identical in order to provide power current paths through the package having substantially identical electrical and thermal impedances.

Abstract: A multi-cellular power field effect semiconductor device includes a high conductivity layer of metal or a metal silicide disposed in intimate contact with the source region of the device. This high conductivity layer is self-aligned with respect to the aperture in the gate electrode through which the source region is diffused. The presence of this high conductivity layer allows a substantially smaller contact window to be employed for making contact between the final metallization and the source region. As a consequence, the aperture in the gate electrode and the cell size of the device can both be substantially reduced. The device has substantially improved operating characteristics. A method of producing the device is also described.

Abstract: A multi-cellular power field effect semiconductor device includes a tungsten silicide/polysilicon/oxide gate electrode stack with low sheet resistance. Preferably, a layer of tungsten is also disposed in intimate contact with the source region of the device. This tunsten layer is self-aligned with respect to the aperture in the gate electrode through which the source region is diffused. The presence of this tungsten layer greatly reduces the resulting ohmic contact resistance to the region. If desired, a tunsten layer can also be disposed in contact with the drain region of the device, again, to lower ohmic contact resistance. The device has substantially improved operating characteristics. Novel processes for producing the device are also described.

Abstract: A synchronous rectifier is able to operate at higher frequencies and provides an output having lower noise than prior art FET synchronous rectifier system by using field effect switching devices which contain only one conductivity type of semiconductor material and connecting a high speed, low charge storage diode in parallel. Schottky diodes are preferred whereby there is no junction diode in the structure. Conventional FETs may be used when paralleled with a Schottky diode which prevents the FET's parasitic internal diode from becoming conductive.

Abstract: A self-protected MOS gated device includes a PN junction disposed in an electrical path between the source electrode and the gate contact of the device and integrally formed with a DMOS cell of the device to protect the DMOS cell from surge voltages. The PN junction has conductivity characteristics selected to provide junction breakdown at a predetermined voltage level and at a predetermined location along the junction.