Abstract: A system includes a memory device with multiple memory dies and at least a spare memory die. A processing device is coupled to the memory device. The processing device is to track a value of a write counter representing a number of write operations performed at the multiple memory dies. The processing device is to activate the spare memory die in response to detection of a failure of a first memory die of the multiple memory dies. The processing device is to store an offset value of the write counter in response to the detection of the activation of the spare memory die, the offset value representing the value of the write counter upon activation of the first spare memory die.

Abstract: Data can be received to be stored at a memory component. A first location of a first layer of the memory component to store a first portion of the data can be determined. A second location of a second layer of the memory component to store a second portion of the data can be determined, where the second layer is different from the first layer. The first portion of the data can be stored at the first layer of the memory component and the second portion of the data can be stored at the second layer of the memory component.

Abstract: A quality rating for a memory device to be installed at a memory sub-system is determined, where the quality rating corresponds to a performance of the memory device at one or more operating temperatures. A determination is made whether the quality rating for the memory device satisfies a first quality rating condition associated with a first temperature zone of two or more temperature zones of the memory sub-system. Responsive to the determination that the quality rating for the memory device satisfies the first quality rating condition, the memory device is assigned to be installed at a first memory device socket of the first temperature zone.

Abstract: A media management operation can be performed at a memory sub-system at a current frequency. An operating characteristic associated with the memory sub-system can be identified. The operating characteristic can reflect at least one of a write count, a bit error rate, or a read-retry trigger rate. A determination can be made as to whether the identified operating characteristic satisfies an operating characteristic criterion. In response to determining that the operating characteristic satisfies the characteristic criterion, the media management operation can be performed at a different frequency relative to the current frequency.

Abstract: A refresh operation can be performed at a memory sub-system The refresh operation can performed at a current frequency. A write count associated with the memory sub-system can be received. A determination can be made as to whether the write count associated with the memory sub-system satisfies a write count threshold. In response to determining that the write count associated with the memory sub-system satisfies the write count threshold, the refresh operation can be performed at an increased frequency relative to the current frequency.

Abstract: Data can be received to be stored at a memory component. A first location of a first layer of the memory component to store a first portion of the data can be determined. A second location of a second layer of the memory component to store a second portion of the data can be determined, where the second layer is different from the first layer. The first portion of the data can be stored at the first layer of the memory component and the second portion of the data can be stored at the second layer of the memory component.

Abstract: A system includes a memory device with multiple memory dies and at least a spare memory die. A processing device is coupled to the memory device. The processing device is to track a value of a write counter representing a number of write operations performed at the multiple memory dies. The processing device is to activate the spare memory die in response to detection of a failure of a first memory die of the multiple memory dies. The processing device is to store an offset value of the write counter in response to the detection of the activation of the spare memory die, the offset value representing the value of the write counter upon activation of the first spare memory die.

Abstract: A refresh operation can be performed at a memory sub-system The refresh operation can performed at a current frequency. A write count associated with the memory sub-system can be received. A determination can be made as to whether the write count associated with the memory sub-system satisfies a write count threshold. In response to determining that the write count associated with the memory sub-system satisfies the write count threshold, the refresh operation can be performed at an increased frequency relative to the current frequency.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable heuristic aware garbage collection in storage systems (e.g., non-volatile data storage systems using one or more flash memory devices). In one aspect, a time parameter (e.g., dwell time) and/or heuristics (e.g., error count, error rate, number of reads, number of times programmed, etc.) are used in a garbage collection scheme. For example, in some implementations, the method of garbage collection for a storage medium in a storage system includes (1) determining a time parameter for a block in the storage medium, and (2) in accordance with a determination that the time parameter for the block is greater than a first threshold time, enabling garbage collection of the block.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable write amplification reduction through reliable writes during garbage collection. In one aspect, lower page/upper page programming is used during write operations performed in response to a host command and coarse/fine programming is used during garbage collection.

Abstract: The various implementations described herein include systems, methods and/or devices that may enhance the reliability with which data can be stored in and read from a memory. The method includes obtaining symbol transition information corresponding to symbol read errors identified while reading data from flash memory cells in a flash memory device. The method further includes determining a reading threshold voltage offset, based at least in part on: a plurality of probability values determined from the symbol transition information; a current count of program-erase cycles; and a word line zone value for a word line zone containing the flash memory cells. Additionally, the method includes generating an updated reading threshold voltage in accordance with the reading threshold voltage offset and the current value of the reading threshold voltage.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable write amplification reduction by delaying read access to data written during garbage collection. In one aspect, read access to a write unit to which data was written during garbage collection is delayed until a predefined subsequent operation has been completed.