Abstract: A microprogrammable data communications preprocessor exercises detailed control over a multiplicity of data lines communicating with a microprogrammable central processor while requiring central processor attention on a message basis only. Further minimization of central processor intervention is achieved through a direct memory access channel which permits data transfer directly from the preprocessor to the main memory of the central processor. The preprocessor also includes a line adapter associated with each data communications line for interface purposes, a scratch pad memory for storing data line parameters, and a microprogrammable serial byte microprocessor. Operational speed is enhanced through the inclusion of automatic operation logic which effectively by-passes the serial byte microprocessor for an automatic transfer of two bytes of data.