Abstract: Data values being stored and transferred within a data processing system 8 have a selectable representation, such as true and complement, as indicated by an accompanying representation specifying bit. This assists in obscuring the operation and the power signature of the device in a manner that improves security.

Abstract: A fixed or permanently installed collapsible dry toilet that when mounted to movable walls as in a Recreational Vehicle or stationary walls, that can quickly be adjusted to any height with height stops for toddlers, 16.5 inches for the American with Disabilities Act of 1992 and 19 inches for seniors. When not in use the toilet seat is hinged so that the seat folds down and hugs the wall and is only 1.6 inches thick when collapsed and is intended for small spaces that can have multiple uses since the toilet can fold into the wall and not occupy any space. A biodegradable plastic bag is placed in the center of the seat and is supported by a replaceable fishnet basket. The plastic bag is of sufficient size to cover the entire toilet seat so that each user has a clean unused covering over the seat. Upon completion the disposable bag is tossed in any garbage receptacle.

Abstract: An apparatus for processing data includes a processor operable in a plurality modes including at least one secure mode being a mode in a secure domain and at least one non-secure mode being a mode in a non-secure domain. When the processor is executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor is responsive to one or more exception conditions for triggering exception processing using an exception handler. The processor is operable to select the exception handler from among a plurality of possible exception handlers in dependence upon whether the processor is operating in the secure domain or the non-secure domain.

Abstract: A data processing system including a processor operable in a plurality of modes and in either a secure domain or a non-secure domain. The system includes at least one secure mode being a mode in the secure domain, at least one non-secure mode being a mode in the non-secure domain, and a monitor mode. When the processor is executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. Switching between the secure and non-secure modes takes place via the monitor mode and the processor is operable at least partially in the monitor mode to execute a monitor program managing switching between the secure and non-secure modes.

Abstract: There is provided a method of controlling a monitoring function of a processor, the processor being operable in at least two domains, comprising a first domain and a second domain, the first and second domains each comprising at least one mode, the method comprising the steps of: setting at least one control value, the at least one control value relating to a condition and being indicative of whether the monitoring function is allowable in the first domain; and only allowing initiation of the monitoring function in the first domain when the condition is present if its related control value indicates that the monitoring function is allowable. In some embodiments the first domain is a secure domain and the monitoring function is a debug or trace function.

Abstract: Method for forming a unitary component from a plurality of powder metallurgy compacts. The method in some embodiments includes fluidizing first and second surfaces, wherein a first powder metallurgy compact defines the first surface and a second powder metallurgy compact defines the second surface. The method also includes joining the fluidizing first and second surfaces to form a bonded structure and thermally treating the bonded structure to fuse the first and second compacts into a unitary component.

Abstract: An apparatus for processing data includes a processor operable in a plurality modes including at least one secure mode being a mode in a secure domain and at least one non-secure mode being a mode in a non-secure domain. When the processor is executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor is responsive to one or more exception conditions for triggering exception processing using an exception handler. The processor is operable to select the exception handler from among a plurality of possible exception handlers in dependence upon whether the processor is operating in the secure domain or the non-secure domain.

Abstract: A processor may utilise two operating systems (Non-Secure, Secure) between which calls may be made. In order that a second operating system can track task switches made by a first operating system, each time a call is made to the second operating system, this call includes an identifier to enable discrimination between the task which was executing on the first operating system when that call was made. The identifier can be a call identifier and/or a target thread identifier and may include further parameters.

Abstract: A processor may utilise two operating systems (Non-Secure, Secure) between which calls may be made. In order that a second operating system can track task switches made by a first operating system, each time a call is made to the second operating system, this call includes an identifier to enable discrimination between the task which was executing on the first operating system when that call was made. The identifier can be a call identifier and/or a target thread identifier and may include further parameters.

Abstract: An apparatus for processing data includes a processor operable in a plurality modes including at least one secure mode being a mode in a secure domain and at least one non-secure mode being a mode in a non-secure domain. When the processor is executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor is responsive to one or more exception conditions for triggering exception processing using an exception handler. The processor is operable to select the exception handler from among a plurality of possible exception handlers in dependence upon whether the processor is operating in the secure domain or the non-secure domain.

Abstract: Data values being stored and transferred within a data processing system 8 have a selectable representation, such as true and complement, as indicated by an accompanying representation specifying bit. This assists in obscuring the operation and the power signature of the device in a manner that improves security.

Abstract: Data values being stored and transferred within a data processing system 8 have a selectable representation, such as true and complement, as indicated by an accompanying representation specifying bit. This assists in obscuring the operation and the power signature of the device in a manner that improves security.

Abstract: A digital processor (2, 102) for use in a digital controller (10) is disclosed. The digital processor (2, 102) includes a coefficient product memory (22) that stores previously calculated products of filter coefficients and each of a set of available input values. The memory (22) is addressed according to a received input value, and outputs a plurality of coefficient products associated with that input value. These coefficient products are combined across time samples (with one or more coefficient products delayed for use in later cycles), to produce an output value. The digital processor (2) can be used in combination with an analog-to-digital converter (4) and a pulse-width modulated circuit (6) to control a power supply. According to another embodiment of the invention, comparators (62H, 62L) and a counter (66) can be used instead of the analog-to-digital converter, for additional efficiency.

Abstract: The present invention provides a data processing apparatus and method for managing access to a memory within the data processing apparatus. The data processing apparatus comprises a processor operable in a plurality of modes and a plurality of domains, said plurality of domains comprising a secure domain and a non-secure domain, said plurality of modes including at least one non-secure mode being a mode in the non-secure domain and at least one secure mode being a mode in the secure domain, said processor being operable such that when executing a program in a secure mode said program has access to secure data which is not accessible when said processor is operating in a non-secure mode. Further, a memory is provided for storing data required by the processor, and consists of secure memory for storing secure data and non-secure memory for storing non-secure data.

Abstract: In a data processing system using multiple operating systems, an interrupt which itself may be interrupted by a subsequent interrupt which will be serviced in a different operating system, guards itself against being overlooked when that subsequent interrupt has been handled by starting a stub interrupt handling routine in that other operating system before executing the main handling routine in the originating operating system. Thus, the stub interrupt handling routine will be recognised in the other operating system irrespective of other interrupt events which may occur and accordingly the interrupted interrupt handling may be restarted.

Abstract: Method for forming a unitary component from a plurality of powder metallurgy compacts. The method in some embodiments includes fluidizing first and second surfaces, wherein a first powder metallurgy compact defines the first surface and a second powder metallurgy compact defines the second surface. The method also includes joining the fluidizing first and second surfaces to form a bonded structure and thermally treating the bonded structure to fuse the first and second compacts into a unitary component.

Abstract: A data processing system includes a processor that can operate in a plurality of modes and in either a secure domain or a non-secure domain. At least one secure mode is a mode in the secure domain, and at least one non-secure mode is a mode in the non-secure domain. When the processor is executing a program in a secure mode and that program has access to secure data which is not accessible when the processor is operating in a non-secure mode, the processor is responsive to exception conditions for triggering exception processing. Specifically, the processor is responsive to a parameter specifying which of the exceptions should be handled by a secure mode exception handler executing in a secure mode and which should be handled by an exception handler executing in a mode within a current one of the secure domain and the non-secure domain when that exception occurs.

Abstract: The present invention provides a data processing apparatus and method for controlling access to a memory unit. The data processing apparatus comprises a processor operable in a plurality of modes and a plurality of domains, said plurality of domains comprising a secure domain and a non-secure domain, said plurality of modes including at least one non-secure mode being a mode in the non-secure domain and at least one secure mode being a mode in the secure domain. The processor is operable such that when executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. A memory unit is also provided that comprises a plurality of entries and is operable to store data required by the processor.

Abstract: In accordance with various embodiments, a rotatable member is mounted to a spindle hub so that initial servo data previously provided to the rotatable member are eccentrically offset with respect to a rotational center of the spindle hub. Compensation vales are determined to characterize said offset, after which final servo data are provided to the rotatable member in relation to the initial servo data and the determined compensation values. The final servo data are nominally concentric with the rotational center of the spindle hub.

Abstract: In a system supporting more than one operating system, a data processing thread executing on a first operating system may be subject to an interrupt which triggers interrupt handling on a second operating system. When that interrupt handling is completed on the second operating system, the first operating system is resumed using a return interrupt. The return interrupt specifies the data processing thread which is active on the second operating system such that an appropriate task switch or resumption may be made on the first operating system. The technique is particularly well suited to systems utilising a secure operating system and a non-secure operating system executing on the same hardware.