Patents by Inventor Charles Wen

Charles Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240093114
    Abstract: A lubricant adheres to a magnetic recording medium via at least one of chemisorption or bonding, and contains a perfluorinated polyether attached to or terminated with a functional group that is phosphonic acid, silanol or carboxylic acid, and may be: R1—Rf—R1 where Rf is —CF2O(CF2CF2CF2CF2O)n—, —CF2O(CF2CF2CF2O)nCF2—, —CF2O[CF(CF3)CF2O]nCF2—, —CF2O(CF2CF2O)m(CF2O)nCF2—, —CF2O(CF2CF2O)nCF2—, n, m is from 1 to 100 and R1 is the functional group. A lubricant is formed from a multiple ether segments according to formula: Re1—Rb1-Ri-Rc-Ri-Rb2—Re2; where Rc includes perfluoroalkyl ether, Rb1 and Rb2 are, independently, a sidechain segment including a perfluoroalkyl ether, optional Ri independently is a divalent linking segment including a functional group including elements from periodic table Group 13-17, and of Re1 and Re2 are phosphonic acid, silanol or carboxylic acid.
    Type: Application
    Filed: May 31, 2023
    Publication date: March 21, 2024
    Inventors: Xingliang He, Huaming Xu, Jianming Wen, Charles Cheng-Hsing Lee
  • Publication number: 20240066710
    Abstract: One embodiment of a method for controlling a robot includes generating a representation of spatial occupancy within an environment based on a plurality of red, green, blue (RGB) images of the environment, determining one or more actions for the robot based on the representation of spatial occupancy and a goal, and causing the robot to perform at least a portion of a movement based on the one or more actions.
    Type: Application
    Filed: February 13, 2023
    Publication date: February 29, 2024
    Inventors: Balakumar SUNDARALINGAM, Stanley BIRCHFIELD, Zhenggang TANG, Jonathan TREMBLAY, Stephen TYREE, Bowen WEN, Ye YUAN, Charles LOOP
  • Patent number: 6528891
    Abstract: A flip chip assembly, and methods of forming the same, including a single or multi-layer substrate having a plurality of via holes which serve as the connection between the semiconductor device and substrate circuitry. The method of manufacturing the flip chip assembly includes the steps of attaching an integrated circuit (IC) chip having a plurality of input/output terminal pads to a rigid or flexible substrate having a plurality of via holes. The via holes are aligned with the terminal pads so that the respective traces on the substrate can be connected to the respective terminal pads through the via holes. After attachment, the pre-deposited solder inside the via holes or on the terminal pads is re-flowed. This re-flow soldering process electrically connects the IC chip to the substrate. The solder can be deposited by plating, wave soldering, meniscus coating, and screen printing techniques.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: March 4, 2003
    Inventor: Charles Wen Chyang Lin
  • Patent number: 6475833
    Abstract: A flip chip assembly, and methods of making the same, including a substrate circuitry having a plurality of via apertures or holes, wherein preformed strips or wires hanging therein and filled conductive material together serve as the electrical connection between a semiconductor device and substrate circuitry. The method and device in accordance with the present invention may include attaching an integrated circuit (IC) chip to a rigid or flexible substrate circuitry having a plurality of pre-formed strips extending from patterned circuitry traces and hanging inside a plurality of through holes. These through holes are aligned and placed above the terminal pads so that the respective traces on the substrate can be readily connected to the respective input/output terminal pads of the IC chip through the leads inside the via apertures or holes.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: November 5, 2002
    Inventor: Charles Wen Chyang Lin
  • Patent number: 6437452
    Abstract: A flip chip assembly, and methods of forming the same, including a single or multi-layer substrate having a plurality of via holes in which pre-formed strips or leads inside the via holes serve as the connections between the semiconductor device and substrate circuitry. The assembling steps include attaching an integrated circuit (IC) chip having a plurality of input/output terminal pads to a rigid or flexible substrate having a plurality of leads extending from the patterned circuitry traces and hanging inside a plurality of through via holes. The via holes are aligned with and expose the terminal pads After attachment, an electrically conductive material connects the leads to the IC terminal pads through electrolytic plating, electroless (chemical) plating or solder re-flow processes. The conductive material provides mechanical support as well as electrical continuity between the IC chip and the circuitry of the substrate.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: August 20, 2002
    Inventor: Charles Wen Chyang Lin
  • Patent number: 6403400
    Abstract: A flip chip assembly, and methods of forming the same, including a single or multi-layer substrate having a plurality of via holes in which pre-formed strips or leads inside the via holes serve as the connections between the semiconductor device and substrate circuitry. The assembling steps include attaching an integrated circuit (IC) chip having a plurality of input/output terminal pads to a rigid or flexible substrate having a plurality of leads extending from the patterned circuitry traces and hanging inside a plurality of via holes. The via holes are aligned with and expose the terminal pads. After attachment, an electrically conductive material connects the leads to the IC terminal pads through electrolytic plating, electroless (chemical) plating or solder re-flow processes. The conductive material provides mechanical support as well as electrical continuity between the IC chip and the circuitry of the substrate.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: June 11, 2002
    Inventor: Charles Wen Chyang Lin
  • Patent number: 6319751
    Abstract: A flip chip assembly, and methods of forming the same, including a single or multilayer substrate having a plurality of via holes which serve as the connection between the semiconductor device and substrate circuitry. The method of manufacturing the flip chip assembly includes attaching an integrated circuit (IC) chip having a plurality of input/output terminal pads to a rigid or flexible substrate having a plurality of via holes. The via holes are aligned with the terminal pads so that the respective traces on the substrate can be connected to the respective terminal pads through the via holes. After attachment, the pre-deposited solder inside the via holes or on the terminal pads is re-flowed. This re-flow soldering process electrically connects the IC chip to the substrate. The soldering can be deposited by plating, wave soldering, meniscus coating, and screen printing techniques.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: November 20, 2001
    Inventor: Charles Wen Chyang Lin
  • Patent number: 6316830
    Abstract: A flip chip assembly, and methods of making the same, including a substrate having a plurality of via holes, wherein pre-formed strips or leads hanging in the via holes and conductive material filled in the via holes together serve as the electrical connection between a semiconductor device and substrate circuitry. The method of manufacturing the flip chip assembly includes attaching an integrated circuit (IC) chip having a plurality of input/output terminal pads to a rigid or flexible substrate having a plurality of leads extending from patterned circuitry traces and hanging inside a plurality of via holes. The via holes are aligned with and expose the terminal pads. After attachment, an electrically conductive material, for example adhesive or solder, is filled into the via holes thereby connecting the leads to the terminal pads. The conductive material not only provides mechanical support but also electrical continuity between the IC chip and the circuitry of the substrate.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: November 13, 2001
    Inventor: Charles Wen Chyang Lin
  • Publication number: 20010024839
    Abstract: A flip chip assembly, and methods of forming the same, including a single or multi-layer substrate having a plurality of via holes or apertures of which pre-formed strips or wires inside the via holes serve as the connections between the semiconductor device and substrate circuitry. The assembling steps may include attaching an integrated circuit (IC) chip or chips to a rigid or flexible substrate circuitry having a plurality of pre-formed strips extended from the patterned circuitry and hanging inside a plurality of through holes. These through holes are aligned and placed on top of the terminal pads so that the respective traces on the substrate can be connected with the respective input/output terminal pads of the IC chip through the leads inside the via holes. After attachment, electrically conductive material is subsequently connected to these leads to the IC terminal pads through electrolytic plating, electroless (chemical) plating or solder re-flow processes.
    Type: Application
    Filed: May 10, 2001
    Publication date: September 27, 2001
    Inventor: Charles Wen Chyang Lin
  • Publication number: 20010018231
    Abstract: A flip chip assembly, and methods of making the same, including a substrate circuitry having a plurality of via apertures or holes, wherein preformed strips or wires hanging therein and filled conductive material together serve as the electrical connection between a semiconductor device and substrate circuitry. The method and device in accordance with the present invention may include attaching an integrated circuit (IC) chip to a rigid or flexible substrate circuitry having a plurality of pre-formed strips extending from patterned circuitry traces and hanging inside a plurality of through holes. These through holes are aligned and placed above the terminal pads so that the respective traces on the substrate can be readily connected to the respective input/output terminal pads of the IC chip through the leads inside the via apertures or holes.
    Type: Application
    Filed: May 10, 2001
    Publication date: August 30, 2001
    Inventor: Charles Wen Chyang Lin
  • Patent number: 6127986
    Abstract: The present invention discloses an integrated dipole antenna and down converter apparatus. The integrated dipole antenna and down converter apparatus includes a dipole antenna for receiving microwave signals therein. The integrated dipole antenna and down converter apparatus further includes a down converter for receiving processed signals of the microwave signals from the dipole antenna for converting the processed signals to signals of lower frequency. The down converter includes main plate for supporting a tunable mechanical filter. The down converter further includes a tunable semi-mechanical filter supported on the plate. The semi-mechanical filter includes an upper circuit assembly and an identically symmetrical lower circuit assembly for canceling electromagnetic waves transmitting in the upper and lower circuit assemblies and the main plate whereby signal filtering efficiency is improved by reducing signal dissipation in the upper and lower circuit assemblies.
    Type: Grant
    Filed: January 2, 1999
    Date of Patent: October 3, 2000
    Assignee: Transystem, Inc.
    Inventors: Charles Wen, Feng-Jen Wang, Shun-Yu Chien
  • Patent number: 5982336
    Abstract: The present invention discloses an integrated dipole antenna and down converter apparatus. The integrated dipole antenna and down converter apparatus includes a dipole antenna for receiving microwave signals therein. The integrated dipole antenna and down converter apparatus further includes a down converter for receiving processed signals of the microwave signals from the dipole antenna for converting the processed signals to signals of lower frequency. The down converter includes main plate for supporting a tunable notch mechanical. The down converter further includes a tunable dual band mechanical filter supported on the plate. The dual band mechanical filter and notch mechanical filter both include capacitance adjusting means adjustable by applying a mechanical screwing method whereby signal filtering efficiency is improved by reducing signal dissipation and the performance of the down converter is improved with the mechanically adjustable dual band and notch mechanical filters.
    Type: Grant
    Filed: August 1, 1998
    Date of Patent: November 9, 1999
    Assignee: Transystems, Inc.
    Inventors: Charles Wen, Feng-Ren Wang, Shun-Yu Chien