Abstract: A computer system is disclosed which includes a design structure including a CPU or microprocessor to drive tightly constrained hardware events. The system comprises a processor having a set of system inputs to drive a functionally programmable event, and a fast branch in the CPU including a state handler to execute instructions from the CPU to process the event. A queue in the CPU stores the events such that the non-pre-empted events are serviced in the order they are received.

Abstract: A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI). Another preferred embodiment is a bus bridge in a bus transceiver on a multi-chip module.

Abstract: A bus bridge for coupling between a first bus and a second includes: at least one data buffer; data load logic and data unload logic. The data load logic places received data in the at least one data buffer, wherein the data is received at the bus bridge from across the first bus in a first data ordering. The data unload logic automatically translates the received data from the first data ordering to a second data ordering during unloading of the data from the at least one data buffer for transfer across the second bus, wherein the first data ordering and the second data ordering are each a different one of a linear data ordering and an interleaved data ordering.

Abstract: A transaction flow control mechanism is disclosed for a bus bridge in a high speed computer system with a high speed interface for a graphics processor. A preferred embodiment provides a flow control mechanism for the bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and a high speed interface. A preferred embodiment of the invention is a bus transceiver on a multi-chip module.

Abstract: A high speed computer processor system has a high speed interface for a graphics processor. A preferred embodiment combines a PowerPC microprocessor called the Giga-Processor Ultralite (GPUL) 110 from International Business Machines Corporation (IBM) with a high speed interface on a multi-chip module.

Abstract: A circuit and method to provide pipeline bit handling across a bus bridge between two different buses. In a preferred embodiment, the pipeline bit handling circuit provides rule enforcement for a P-bit address modifier across a bus bridge between two different buses with different rules for the P-bit address modifier. In a bus domain where pipeline transactions are allowed if the P-Bit is asserted and are not allowed if the P-Bit is not asserted, embodiments herein allow a master bus device to ensure that all bus devices will see a P=0 command with a defined minimum spacing to any other P=0 command. The required separation for P=0 commands is maintained within the bus bridge. In the preferred embodiments, the separation between P=0 commands is maintained by immediately retrying P=0 commands rather than spacing snoop requests.

Abstract: A bus bridge for coupling between a first bus and a second bus includes: a number of data buffers for a particular request type; a counter for monitoring a number of requests of the particular type received at the bus bridge from the first bus for access to the second bus; and override logic. Each request of the particular type requires one data buffer of the number of data buffers for the particular request type. The override logic determines when the monitored number of requests of the particular type exceeds the number of data buffers for the particular request type at the bus bridge, and responsive thereto, initiates a request termination signal at the bus bridge to terminate a received request of the particular type. When request coherency is maintained employing snooping, the request termination signal is a retry snoop response signal output from the bus bridge.

Abstract: A bus bridge for coupling between a first bus and a second bus includes: multiple ticket registers; a ticket dispenser counter; and a ticket call counter. The ticket dispenser counter dispenses a ticket value to a request received at the bridge from the first bus for access to the second bus. This ticket value is held in one ticket register of the multiple ticket registers. The ticket call counter provides ticket call values, and the request is granted access to the second bus when a current ticket call value equals the ticket value dispensed to the request. While the request waits for access to the second bus, the bus bridge can perform work on the request. When request coherency is maintained employing snooping, ticket values assigned to a plurality of requests maintain a snoop response ordering of the requests for access to the second bus.

Abstract: An apparatus and method to provide tag mapping between bus domains across a bus bridge. The preferred embodiments provide a simple tag mapping design while maintaining unique IDs for all outstanding transactions for an overall increase in computer system performance. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI bus). In preferred embodiments, the transaction mapping logic ensures that transactions generated by any logical unit (CPU) appear to originate from a single logical unit.

Abstract: A method and means for automatic alignment of ink-jet printheads includes fitting measuring constructs to actual print data acquired form a print made using a given, predetermined, test pattern data set. Specific test patterns for use in automated alignment of ink-jet printheads are suited to providing a variety of printhead alignment information in a compact format. The test pattern data set incorporates techniques for avoiding carriage-induced dynamic errors during automated alignment of ink-jet printheads.

Abstract: A method and means for automatic alignment of ink-jet printheads includes fitting measuring constructs to actual print data acquired form a print made using a given, predetermined, test pattern data set. Specific test patterns for use in automated alignment of ink-jet printheads are suited to providing a variety of printhead alignment information in a compact format. The test pattern data set incorporates techniques for avoiding carriage-induced dynamic errors during automated alignment of ink-jet printheads.

Abstract: A method and means for automatic alignment of ink-jet printheads includes fitting measuring constructs to actual print data acquired form a print made using a given, predetermined, test pattern data set. Specific test patterns for use in automated alignment of ink-jet printheads are suited to providing a variety of printhead alignment information in a compact format. The test pattern data set incorporates techniques for avoiding carriage-induced dynamic errors during automated alignment of ink-jet printheads.

Abstract: A method and apparatus for automatic alignment of ink-jet printheads includes fitting measuring constructs to actual print data acquired form a print made using a given, predetermined, test pattern data set. Specific test patterns for use in automated alignment of ink-jet printheads are suited to providing a variety of printhead alignment information in a compact format. The test pattern data set incorporates techniques for avoiding carriage-induced dynamic errors during automated alignment of ink-jet printheads.

Abstract: A method and means for automatic alignment of ink-jet printheads includes fitting measuring constructs to actual print data acquired form a print made using a given, predetermined, test pattern data set. Specific test patterns for use in automated alignment of ink-jet printheads are suited to providing a variety of printhead alignment information in a compact format. The test pattern data set incorporates techniques for avoiding carriage-induced dynamic errors during automated alignment of ink-jet printheads.

Abstract: A method and means for automatic alignment of ink-jet printheads includes fitting measuring constructs to actual print data acquired form a print made using a given, predetermined, test pattern data set. Specific test patterns for use in automated alignment of ink-jet printheads are suited to providing a variety of printhead alignment information in a compact format. The test pattern data set incorporates techniques for avoiding carriage-induced dynamic errors during automated alignment of ink-jet printheads.

Abstract: A method and device for automatic or semi-automatic collection of saliva has a mouthpiece on a wand. The wand is connected to an interface section via a flexible conduit. Saliva is transported by aspiration into the device. Bulk air is removed and saliva is collected in a collection chamber. For collection of volatile components, air flow, vacuum, conduit diameter and length, and collection times are controlled and limited, to reduce loss of volatile components.