Patents by Inventor Chau-Jie Tsai

Chau-Jie Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5670432
    Abstract: The present invention provides a method of manufacturing a void free, reduced stress aluminum layer and an overlying silicon nitride layer on a substrate, comprising: forming a gate oxide layer 12 over said substrate, forming a polysilicon layer 14 over said gate oxide layer 12; forming a polyoxide layer 16 over said polysilicon layer 14; forming a first insulating layer 18 composed of silicon nitride over said polyoxide layer 16; forming an aluminum alloy layer 20 over said first insulating layer; forming a silicon nitride layer 24 over said aluminum alloy layer 20 by ramping said substrate from room temperature up to between about 345.degree. and 355.degree. C., at a pressure between about 2200 and 2500 m torr, in a N.sub.2 ambient, for time of between about 3 and 8 minutes; and ramping the temperature down to between 315.degree. and 325.degree. C. and depositing silicon nitride over said aluminum layer at a temperature of between about 315.degree. and 325.degree. C.
    Type: Grant
    Filed: August 1, 1996
    Date of Patent: September 23, 1997
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chau-Jie Tsai