Abstract: A wafer containing an array of integrated circuit dice, wherein the dice are separated by scribe lanes in which the wafer may be cut to dice the wafer into individual die, is so constructed as to enable burn-in testing of the integrated circuits while they are still in the wafer. In this wafer, individual integrated circuits of the array include contact pads that extend into the scribe lanes for use during burn-in testing of the integrated circuits while they are contained in the wafer. A system for testing such a wafer includes a testing station for applying and monitoring burn-in test signals for individual integrated circuits; and contact probes for coupling the testing station to the contact pads for a plurality of the individual integrated circuits to enable separate burn-in tests to be conducted simultaneously for a plurality of the individual integrated circuits while they are contained in the wafer.

Abstract: In a method of semiconductor integrated circuit manufacture, a manufacturing process improvement provides highly planar, oxide-filled trench isolation of circuit device areas. The process improvement includes formation of a device area covered by a relatively thin insulating layer of oxide by a trenching process that forms a trench adjacent the device area. The thin insulating layer of oxide is extended over the side surface transition between the device area and the trench and then an insulating layer of crystalline dielectric material relatively thicker than the thin insulating layer is applied, which builds the trench at least to the level of the device area. A first layer of photoresist is applied over the thick insulating layer.

Abstract: In the process of manufacturing integrated circuits, the steps of forming a layer of polysilicon, in which a dopant will be implanted, over an oxide mask having suitable windows to define zones of one conductivity type to be formed in a substrate of another conductivity type, driving the dopant from the polysilicon layer into the substrate to form the zones in the substrate, oxidizing the polysilicon layer so that the oxidized polysilicon layer and the mask become an integral layer, and then removing the integrated oxide layer. Thereafter, other layers may be formed on the substrate.

Abstract: An improved method for forming a semiconductor integrated circuit device wherein the active base area of a transistor formed therein is controlled by first forming the inactive base area and later forming the active base area, after the emitter has been formed, thus assuring the desired control over the current gain of the transistor. The separate steps of forming the inactive base area apart from the active base area eliminates the dependency of the inactive base area on the active base area so that the resistance of the inactive base area, which affects the speed of the circuit device, can be independently selected. Additionally disclosed is a method of forming the semiconductor device by a self-aligning mask technique reducing the number of critical masks and eliminating attendant alignment problems.