Patents by Inventor Chau-Yun Hsu

Chau-Yun Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7917565
    Abstract: A high-speed radix-4 butterfly module and the method of performing Viterbi decoding using the same. The high-speed radix-4 butterfly module includes first to fourth add-compare-select (ACS) circuits. The first and the second ACS circuits receive first to fourth branch metric values and first to fourth previous-stage path metric values, and accordingly produces a first and a second path metric values. The third and the fourth ACS circuits receive fifth to eighth branch metric values and the first to the fourth previous-stage path metric values, and accordingly produces a third and a fourth path metric values. The radix-4 butterfly unit of the invention uses the symmetric relation to reduce an amount of branch computation required for each radix-4 butterfly unit to a half. Thus, the circuit complexity of the typical radix-4 butterfly module and the hardware cost of the Viterbi decoder are reduced.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: March 29, 2011
    Assignee: Tatung Company
    Inventors: Tsung-Sheng Kuo, Chau-Yun Hsu, Yuan-Hung Hsu
  • Publication number: 20080162617
    Abstract: A high-speed radix-4 butterfly module and the method of performing Viterbi decoding using the same. The high-speed radix-4 butterfly module includes first to fourth add-compare-select (ACS) circuits. The first and the second ACS circuits receive first to fourth branch metric values and first to fourth previous-stage path metric values, and accordingly produces a first and a second path metric values. The third and the fourth ACS circuits receive fifth to eighth branch metric values and the first to the fourth previous-stage path metric values, and accordingly produces a third and a fourth path metric values. The radix-4 butterfly unit of the invention uses the symmetric relation to reduce an amount of branch computation required for each radix-4 butterfly unit to a half. Thus, the circuit complexity of the typical radix-4 butterfly module and the hardware cost of the Viterbi decoder are reduced.
    Type: Application
    Filed: May 8, 2007
    Publication date: July 3, 2008
    Applicant: Tatung Company
    Inventors: Tsung-Sheng Kuo, Chau-Yun Hsu, Yuan-Hung Hsu