Patents by Inventor Chaunbin Pan

Chaunbin Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interconnect structure and method to achieve unlanded vias for low dielectric constant materials
    Patent number: 5935868
    Abstract: A method of forming an interconnect structure using a low dielectric constant material as an intralayer dielectric is described. In one embodiment, the present inventive method comprises the following steps. A conductive structure that is surrounded by a low dielectric constant material on its side surfaces is formed. A first inorganic insulator is formed over at least a portion of the low dielectric constant material. A second inorganic insulator is formed over the first inorganic insulator. A photoresist layer is deposited and then patterned to form an unlanded via in the second inorganic insulator. The second inorganic insulator and a portion of the first inorganic insulator are etched in order to form the unlanded via.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: August 10, 1999
    Assignee: Intel Corporation
    Inventors: Sychyi Fang, Chaunbin Pan, Sing-Mo Tzeng, Chien Chiang