Patents by Inventor Chayan Biswas

Chayan Biswas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11442928
    Abstract: Techniques for database connection management and governance in a multi-tenant provider network are described. One or more database proxy instances connect to client applications and can obtain database connections for these client applications. The database connections may be pinned to particular client applications and/or multiplexed and thus shared by multiple client connections.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: September 13, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Chayan Biswas, Anoop Gupta, Sirish Chandrasekaran, Lawrence Webley, Anton Okmyanskiy
  • Publication number: 20220164228
    Abstract: Fine-grained virtualization provisioning may be performed for in-place database scaling. Computing resource utilization for a database on a host system is obtained for a period of time. The computing resource utilization may be evaluated with respect to a target capacity for the database. If a scaling event is detected based on the evaluation, a modified target capacity may be determined and used to make an adjustment of the computing resources permitted to be used by the database.
    Type: Application
    Filed: March 24, 2021
    Publication date: May 26, 2022
    Applicant: Amazon Technologies, Inc.
    Inventors: Yuri Volobuev, Murali Brahmadesam, Stefano Stefani, Daniel Bauman, Alexey Kuznetsov, Krishnamoorthy Rajarathinam, Balasubramaniam Bodeddula, Xiang Peng, Dmitriy Setrakyan, Pooya Saadatpanah, Grant A. McAlister, Anthony Paul Hooper, Navaneetha Krishnan Thanka Nadar, Chayan Biswas, Tobias Joakim Bertil Ternstrom
  • Publication number: 20210133183
    Abstract: Techniques for database connection management and governance in a multi-tenant provider network are described. One or more database proxy instances connect to client applications and can obtain database connections for these client applications. The database connections may be pinned to particular client applications and/or multiplexed and thus shared by multiple client connections.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 6, 2021
    Inventors: Chayan BISWAS, Anoop GUPTA, Sirish CHANDRASEKARAN, Lawrence WEBLEY, Anton OKMYANSKIY
  • Patent number: 10656840
    Abstract: Systems, methods and/or devices are used to enable real-time I/O pattern recognition to enhance performance and endurance of a storage device. In one aspect, the method includes (1) at a storage device, receiving from a host a plurality of input/output (I/O) requests, the I/O requests specifying operations to be performed in a plurality of regions in a logical address space of the host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) maintaining a history of I/O request patterns in the region for a predetermined time period, and (b) using the history of I/O request patterns in the region to adjust subsequent I/O processing in the region.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: May 19, 2020
    Assignee: SanDisk Technologies LLC
    Inventors: Dharani Kotte, Akshay Mathur, Chayan Biswas, Baskaran Kannan, Sumant K. Patro
  • Patent number: 10656842
    Abstract: Systems, methods and/or devices are used to enable using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) determining whether the region has a history of I/O requests to access data of size less than a predefined small-size threshold during a predetermined time period, (b) determining whether the region has a history of sequential write requests during the predetermined time period, and (c) if both determinations are true, coalescing subsequent write requests to the region.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: May 19, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Akshay Mathur, Dharani Kotte, Chayan Biswas, Baskaran Kannan, Sumant K. Patro
  • Patent number: 10372613
    Abstract: Systems, methods and/or devices are used to enable using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests including read requests and write requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including, for each sub-region of a plurality of sub-regions of the region: (a) determining whether the sub-region is accessed more than a predetermined threshold number of times during a predetermined time period, and (b) if so, caching, from a storage medium of the storage device to a cache of the storage device, data from the sub-region.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: August 6, 2019
    Assignee: Sandisk Technologies LLC
    Inventors: Akshay Mathur, Dharani Kotte, Chayan Biswas, Baskaran Kannan, Sumant K. Patro
  • Patent number: 10162748
    Abstract: Systems, methods and/or devices are used to enable prioritizing garbage collection and block allocation based on I/O history for logical address regions. In one aspect, the method includes (1) receiving, at a storage device, a plurality of input/output (I/O) requests from a host, the plurality of I/O requests including read requests and write requests to be performed in a plurality of regions in a logical address space of the host, (2) in accordance with the plurality of I/O requests over a predetermined time period, identifying an idle region of the plurality of regions in the logical address space of the host, and (3) in accordance with the identification of the idle region, enabling garbage collection of data storage blocks, in the storage device, that store data in the idle region.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: December 25, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Dharani Kotte, Akshay Mathur, Chayan Biswas, Sumant K. Patro, Baskaran Kannan
  • Patent number: 10114557
    Abstract: Systems, methods and/or devices are used to enable identification of hot regions to enhance performance and endurance of a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) determining whether the region is accessed by the plurality of I/O requests more than a predetermined threshold number of times during a predetermined time period, (b) if so, marking the region with a hot region indicator, and (c) while the region is marked with the hot region indicator, identifying open blocks associated with the region, and marking each of the identified open blocks with a hot block indicator.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: October 30, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Dharani Kotte, Akshay Mathur, Chayan Biswas, Sumant K. Patro
  • Publication number: 20180260342
    Abstract: A mass storage device and a method for wirelessly transmitting a first information by a mass storage device is disclosed. In one embodiment, the mass storage device includes one or more memory devices and a mass storage device controller communicatively coupled to the one or more memory devices. The mass storage device controller includes one or more controller processors and a wireless sideband interface. The wireless sideband interface is configured to wirelessly transmit the first information retrieved by an interface processor of the wireless sideband interface from one of the controller processors or one of the memory devices. In one embodiment, the interface processor is an internet-of-things (IoT) processor.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 13, 2018
    Inventors: Senthil Murugan Thangaraj, Narasimhulu Dharani Kotte, Chayan Biswas, Robert Reed, Hitoshi Kondo
  • Patent number: 9703491
    Abstract: Systems, methods and/or devices are used to enable using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests including read requests and write requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) determining whether the region has a history of unaligned write requests during a predetermined time period, and (b) if so: (i) determining one or more sub-regions within the region that are accessed more than a predetermined threshold number of times during the predetermined time period, and (ii) caching data from the determined one or more sub-regions.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: July 11, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Akshay Mathur, Dharani Kotte, Chayan Biswas, Baskaran Kannan
  • Publication number: 20150347030
    Abstract: Systems, methods and/or devices are used to enable using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests including read requests and write requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) determining whether the region has a history of unaligned write requests during a predetermined time period, and (b) if so: (i) determining one or more sub-regions within the region that are accessed more than a predetermined threshold number of times during the predetermined time period, and (ii) caching data from the determined one or more sub-regions.
    Type: Application
    Filed: July 3, 2014
    Publication date: December 3, 2015
    Inventors: Akshay Mathur, Dharani Kotte, Chayan Biswas, Baskaran Kannan
  • Publication number: 20150347040
    Abstract: Systems, methods and/or devices are used to enable using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) determining whether the region has a history of I/O requests to access data of size less than a predefined small-size threshold during a predetermined time period, (b) determining whether the region has a history of sequential write requests during the predetermined time period, and (c) if both determinations are true, coalescing subsequent write requests to the region.
    Type: Application
    Filed: July 3, 2014
    Publication date: December 3, 2015
    Inventors: Akshay Mathur, Dharani Kotte, Chayan Biswas, Baskaran Kannan, Sumant K. Patro
  • Publication number: 20150347013
    Abstract: Systems, methods and/or devices are used to enable using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests including read requests and write requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including, for each sub-region of a plurality of sub-regions of the region: (a) determining whether the sub-region is accessed more than a predetermined threshold number of times during a predetermined time period, and (b) if so, caching, from a storage medium of the storage device to a cache of the storage device, data from the sub-region.
    Type: Application
    Filed: July 3, 2014
    Publication date: December 3, 2015
    Inventors: Akshay Mathur, Dharani Kotte, Chayan Biswas, Baskaran Kannan, Sumant K. Patro
  • Publication number: 20150347028
    Abstract: Systems, methods and/or devices are used to enable real-time I/O pattern recognition to enhance performance and endurance of a storage device. In one aspect, the method includes (1) at a storage device, receiving from a host a plurality of input/output (I/O) requests, the I/O requests specifying operations to be performed in a plurality of regions in a logical address space of the host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) maintaining a history of I/O request patterns in the region for a predetermined time period, and (b) using the history of I/O request patterns in the region to adjust subsequent I/O processing in the region.
    Type: Application
    Filed: July 3, 2014
    Publication date: December 3, 2015
    Inventors: Dharani Kotte, Akshay Mathur, Chayan Biswas, Baskaran Kannan, Sumant K. Patro
  • Publication number: 20150347029
    Abstract: Systems, methods and/or devices are used to enable identification of hot regions to enhance performance and endurance of a non-volatile storage device. In one aspect, the method includes (1) receiving a plurality of input/output (I/O) requests to be performed in a plurality of regions in a logical address space of a host, and (2) performing one or more operations for each region of the plurality of regions in the logical address space of the host, including (a) determining whether the region is accessed by the plurality of I/O requests more than a predetermined threshold number of times during a predetermined time period, (b) if so, marking the region with a hot region indicator, and (c) while the region is marked with the hot region indicator, identifying open blocks associated with the region, and marking each of the identified open blocks with a hot block indicator.
    Type: Application
    Filed: July 3, 2014
    Publication date: December 3, 2015
    Inventors: Dharani Kotte, Akshay Mathur, Chayan Biswas, Sumant K. Patro
  • Publication number: 20150347296
    Abstract: Systems, methods and/or devices are used to enable prioritizing garbage collection and block allocation based on I/O history for logical address regions. In one aspect, the method includes (1) receiving, at a storage device, a plurality of input/output (I/O) requests from a host, the plurality of I/O requests including read requests and write requests to be performed in a plurality of regions in a logical address space of the host, (2) in accordance with the plurality of I/O requests over a predetermined time period, identifying an idle region of the plurality of regions in the logical address space of the host, and (3) in accordance with the identification of the idle region, enabling garbage collection of data storage blocks, in the storage device, that store data in the idle region.
    Type: Application
    Filed: July 3, 2014
    Publication date: December 3, 2015
    Inventors: Dharani Kotte, Akshay Mathur, Chayan Biswas, Sumant K. Patro, Baskaran Kannan
  • Patent number: 7117310
    Abstract: Systems and methods for maintaining cache coherency between a first controller and a redundant peer controller while reducing communication overhead processing involved in the coherency message exchange. Header or meta-data information is accumulated in a buffer in a first controller along with updated cache data (if any) and forwarded to the peer controller. The accumulating information may be double buffered so that a buffer is filling as a previously filled buffer is transmitting to the peer controller. The peer controller processes the received information to update its mirror cache to maintain coherency with the first controller's cache memory with respect to dirty data. The method and systems avoid the need to update cache coherency in response to every flush operation performed within the first controller to thereby improve overall system performance.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: October 3, 2006
    Assignee: LSI Logic Corporation
    Inventors: Paresh Chatterjee, Chayan Biswas, Ragendra Mishra, Senthil Thangaraj
  • Patent number: 7062605
    Abstract: Methods and structure for initializing a RAID storage volume substantially in parallel with processing of host generated I/O requests. Initialization of a RAID volume may be performed as a background task in one aspect of the invention while host generated I/O requests proceed in parallel with the initialization. The initialization may preferably the performed by zeroing all data including parity for each stripe to thereby make each stripe XOR consistent. Host generated I/O requests to write information on the volume may utilize standard read-modify-write requests where the entire I/O request affects information in a portion of the volume already initialized by background processing. Other host I/O requests use standard techniques for generating parity for all stripes affected by the write requests. These and other features and aspects of the present invention make a newly defined RAID volume available for host processing is quickly as possible.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: June 13, 2006
    Assignee: LSI Logic Corporation
    Inventors: Paresh Chatterjee, Chayan Biswas, Ragendra Mishra, Basavaraj Hallyal
  • Publication number: 20050182906
    Abstract: Systems and methods for maintaining cache coherency between a first controller and a redundant peer controller while reducing communication overhead processing involved in the coherency message exchange. Header or meta-data information is accumulated in a buffer in a first controller along with updated cache data (if any) and forwarded to the peer controller. The accumulating information may be double buffered so that a buffer is filling as a previously filled buffer is transmitting to the peer controller. The peer controller processes the received information to update its mirror cache to maintain coherency with the first controller's cache memory with respect to dirty data. The method and systems avoid the need to update cache coherency in response to every flush operation performed within the first controller to thereby improve overall system performance.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 18, 2005
    Inventors: Paresh Chatterjee, Chayan Biswas, Ragendra Mishra, Senthil Thangaraj
  • Patent number: 6892276
    Abstract: The present invention is directed to a system and method for increased data availability. In an aspect of the present invention, a method includes receiving a SMART indication from a data storage device included in a plurality of data storage devices configured as a RAID array. Data from the data storage device which originated the SMART indication is replicated to a second data storage device. The second data storage device was not originally configured in the RAID array with the plurality of data storage devices for data storage. The data storage device which originated the SMART indication from the RAID array is removed, thereby resulting the second data storage device and the plurality of data storage devices configured as a RAID array.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: May 10, 2005
    Assignee: LSI Logic Corporation
    Inventors: Paresh Chatterjee, Ragendra Mishra, Chayan Biswas, Basavaraj Hallyal