Patents by Inventor Che AN
Che AN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12027604Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.Type: GrantFiled: June 28, 2023Date of Patent: July 2, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
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Patent number: 12025800Abstract: An optical lens is provided. The optical lens includes a first lens element to a fifth lens element sequentially arranged from a light incident side to a light exit side. An image generation device is disposed at the light incident side, and the optical lens is configured to receive an image beam provided by the image generation device. The image beam forms a stop at the light exit side. The stop has a minimum cross-sectional area of beam shrinkage of the image beam. The optical lens provided by the invention exhibits good optical quality and thermal stability.Type: GrantFiled: February 2, 2021Date of Patent: July 2, 2024Assignee: Coretronic CorporationInventors: Tao-Hung Kuo, Fu-Ming Chuang, Po-Che Lee, Hsin-Wen Tsai
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Patent number: 12027594Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure including sacrificial gate electrode is formed over a substrate. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The recessing the first dielectric layer comprises a first etching operation and a second etching operation using a different etching as from the first etching operation.Type: GrantFiled: August 27, 2021Date of Patent: July 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsu Ming Hsiao, Shen Wang, Kung Shu Hsu, Hong Pin Lin, Shiang-Bau Wang, Che-Fu Chen
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Patent number: 12028595Abstract: A portable electronic device and an image-capturing module thereof are provided. The image-capturing module includes a circuit substrate, an image sensing chip, a rigidity reinforcing structure, and a lens assembly. The circuit substrate has a plurality of conductive substrate contacts. The image sensing chip is disposed on the circuit substrate and electrically connected to the circuit substrate. The image sensing chip includes an image sensing region, and a plurality of conductive chip contacts respectively and electrically connected to the conductive substrate contacts. The rigidity reinforcing structure is disposed on the circuit substrate. The lens assembly includes a lens holder and a lens structure disposed on the lens holder, and the lens structure corresponds to the image sensing region. A perpendicular projection of each of the conductive substrate contacts and a perpendicular projection of each of the conductive chip contacts can be shown on the rigidity reinforcing structure.Type: GrantFiled: November 22, 2021Date of Patent: July 2, 2024Assignee: AZUREWAVE TECHNOLOGIES, INC.Inventors: Chih-Yuan Chuang, Chien-Che Ting
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Patent number: 12027569Abstract: A dual-sided imaging thin film display structure is provided, comprising a light source, a reflective polarizing element, a basing layer and a linear polarizing element. The reflective polarizing element is disposed on a front surface of the light source, the basing layer is disposed on a back surface of the light source, and the linear polarizing element is further disposed behind the basing layer. A transmission axis of the reflective polarizing element and that of the linear polarizing element are orthogonal, such that a light beam emitted from the light source passes through the reflective polarizing element to form a front image, be reflected by the reflective polarizing element, and passes through the linear polarizing element to form a back image. By employing the present invention, it achieves to provide dual-sided images and interferences between the images are suppressed to obtain superior imaging quality and resolution.Type: GrantFiled: September 29, 2021Date of Patent: July 2, 2024Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (Shenzhen) Co., Ltd., General Interface Solution LimitedInventors: Che Wen Chiang, Po Lun Chen
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Patent number: 12029063Abstract: The disclosure provides a display panel, a method for manufacturing same, and a displaying device. The display panel is provided with a plurality of display units arranged at intervals and tensile units connecting every two adjacent display units, and the display panel further comprises a substrate; light-emitting elements arranged on one side of the substrate and positioned in the display units; and package structures at least arranged on the surfaces, away from the substrate, of the light-emitting elements and comprising at least one inorganic insulating layer, wherein orthographic projections of at least part of the tensile units on the substrate do not overlap with orthographic projections of the inorganic insulating layers on the substrate.Type: GrantFiled: October 19, 2021Date of Patent: July 2, 2024Assignee: BOE Technology Group Co., Ltd.Inventors: Jingkai Ni, Zhongyuan Sun, Jinxiang Xue, Wenqi Liu, Che An
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Patent number: 12027328Abstract: A switch control device includes a casing, a motor, a control unit, and a push arm. The casing includes a mounting wall adapted to be mounted on a mounting surface, and a surrounding wall extending transversely from the mounting wall. The motor is disposed in the casing and has a rotary shaft extending through the surrounding wall. The control unit is connected to the motor. The push arm is disposed outside of the surrounding wall and is coupled to the rotary shaft so as to be driven to rotate relative to the casing without touching the casing, between a pushing state and a release state, thereby controlling the switch.Type: GrantFiled: December 6, 2021Date of Patent: July 2, 2024Assignees: CANDY HOUSE INC., CANDY HOUSE INC.Inventors: Che-Ming Ku, Wen Hang Su
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Patent number: 12029049Abstract: A memory device includes a substrate, an electrical channel layer, a first electrode, a resistive switching layer, a second electrode, and a conductive structure. The electrical channel layer is disposed on the substrate. The first electrode is disposed on the substrate and extends into the electrical channel layer. The resistive switching layer is disposed between the first electrode and the electrical channel layer. The second electrode is disposed on the electrical channel layer. The conductive structure connects the electrical channel layer and the second electrode.Type: GrantFiled: December 16, 2020Date of Patent: July 2, 2024Assignee: WINBOND ELECTRONICS CORP.Inventors: Po-Yen Hsu, Bo-Lun Wu, Tse-Mian Kuo, Wei-Che Chang, Shuo-Che Chang
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Patent number: 12027561Abstract: An image transducer and a 3D image capturing system having the image transducer are provided. The image transducer includes a microlens, first function layer, first photosensitive layer, second function layer, second photosensitive layer, first read circuit and second read circuit; thus, the image transducer includes two photosensitive layers and is vertically structured. The two photosensitive layers greatly increase sensing waveband. The 3D image capturing system uses the image transducer to enhance pixel screen fineness of a 3D screen.Type: GrantFiled: September 23, 2021Date of Patent: July 2, 2024Inventor: Hao-Che Liu
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Patent number: 12027554Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first image sensing element and a second image sensing element arranged over a substrate. A first micro-lens is arranged over the first image sensing element, and a second micro-lens is arranged over the second image sensing element. A composite deep trench isolation structure is arranged between the first and second image sensing elements. The composite deep trench isolation structure includes a lower portion arranged over the substrate and an upper portion arranged over the lower portion. The lower portion includes a first material, and the upper portion includes a second material that has a higher reflectivity than the first material.Type: GrantFiled: January 8, 2021Date of Patent: July 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Che Wei Yang, Sheng-Chan Li, Tsun-Kai Tsao, Chih-Cheng Shih, Sheng-Chau Chen, Cheng-Yuan Tsai
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Patent number: 12027415Abstract: In one exemplary aspect, a method for semiconductor manufacturing comprises forming first and second silicon nitride features on sidewall surfaces of a contact hole, where the contact hole is disposed in a dielectric layer and above a source/drain (S/D) feature. The method further comprises forming a contact plug in the contact hole, the contact plug being electrically coupled to the S/D feature, removing a top portion of the contact plug to create a recess in the contact hole, forming a hard mask layer in the recess, and removing the first and second silicon nitride features via selective etching to form first and second air gaps, respectively.Type: GrantFiled: July 26, 2022Date of Patent: July 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsin-Che Chiang, Ju-Li Huang, Chun-Sheng Liang, Jeng-Ya Yeh
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Patent number: 12028063Abstract: A control wheel includes a casing, a wheel ring, a first magnetic element, a pivotal shaft and a second magnetic element. The casing includes an accommodation structure and a concave structure. The accommodation structure includes a base. The wheel ring is disposed within the accommodation structure. The wheel ring is exposed outside through the accommodation structure and the concave structure. The pivotal shaft is disposed within the wheel ring and connected with the base of the accommodation structure. The wheel ring is rotatable relative to the pivotal shaft. The first magnetic element is disposed within the wheel ring. The second magnetic element is disposed within the base of the accommodation structure. The first magnetic element of the wheel ring and the second magnetic element are magnetically attracted by each other. Consequently, a rotating speed of the wheel ring is decreased.Type: GrantFiled: July 5, 2022Date of Patent: July 2, 2024Assignee: PRIMAX ELECTRONICS LTD.Inventors: Chun-Che Wu, Ming-Hao Hsieh, Sheng-An Tsai
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Patent number: 12027433Abstract: A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.Type: GrantFiled: August 10, 2022Date of Patent: July 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yang-Che Chen, Chen-Hua Lin, Huang-Wen Tseng, Victor Chiang Liang, Chwen-Ming Liu
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Patent number: 12029139Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region; a first MTJ on the MTJ region; a first metal interconnection on the logic region; and a cap layer extending from a sidewall of the first MTJ to a sidewall of the first metal interconnection. Preferably, the cap layer on the MTJ region and the cap layer on the logic region comprise different thicknesses.Type: GrantFiled: May 25, 2023Date of Patent: July 2, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Yu-Ping Wang, Chen-Yi Weng, Chin-Yang Hsieh, Si-Han Tsai, Che-Wei Chang, Jing-Yin Jhang
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Patent number: 12027650Abstract: An optical display structure is provided, including a basing layer, a lighting source layer and a capping layer. The basing layer includes a substrate and at least one trace configuration layer. The lighting source layer is disposed on the basing layer at d emits a plurality of lights for providing a light source. The capping layer is disposed above the lighting source layer to seal the optical display structure. An upper light shielding layer is alternatively disposed on the lighting source layer to shield cross-talk interferences of the emitted lights. A lower light shielding layer is alternatively disposed below the basing layer to shield reflected light from the back side of the substrate. Preferably, both the upper and lower light shielding layers can be disposed at the same time to shield cross-talk interferences and reflected light for providing an optimized inventive effect of the present invention.Type: GrantFiled: September 28, 2021Date of Patent: July 2, 2024Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (Shenzhen) Co., Ltd., General Interface Solution LimitedInventors: Che Wen Chiang, Tsung Yi Su, Po Lun Chen
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Patent number: 12028519Abstract: An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. In the CCALF process, in response to a coordinate of the second reconstructed image sample being (x, y), coordinates of the first reconstructed image samples are (2x, 2y?1), (2x?1, 2y), (2x, 2y), (2x+1, 2y), (2x?1, 2y+1), (2x, 2y+1), (2x+1, 2y+1), and (2x, 2y+2).Type: GrantFiled: November 29, 2022Date of Patent: July 2, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Jing Ya Li, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Che Wei Kuo, Chu Tong Wang, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
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Patent number: 12025789Abstract: A display system includes an image display device and a pair of shutter glasses. The image display device includes a display panel, a display communication circuit and a control circuit. The control circuit is configured to control the display communication circuit to transmit a shutter glasses control signal, and configured to control the display panel to alternately display a normal image and a compensate image according to a timing control signal. The pair of shutter glasses includes a pair of shutters, a glasses communication circuit and a shutter control circuit. The glasses communication circuit is configured to receive the shutter glasses control signal. The shutter control circuit is configured to alternately open and close the pair of shutters according to the shutter glasses control signal.Type: GrantFiled: September 22, 2021Date of Patent: July 2, 2024Assignee: HIMAX TECHNOLOGIES LIMITEDInventors: Kuan-Sheng Yang, Ming-Hung Weng, Cheng-Che Tsai
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Patent number: 12028291Abstract: Methods and apparatuses for handling discontinuous reception and partial sensing for sidelink communication to reduce potential latency due to additional sensing, and to improve resource utilization efficiency. A first device can perform sidelink communication to at least a second device, or a second device in a sidelink resource pool, and trigger to perform resource selection for a sidelink data at a timing. The first device can perform sensing for a first contiguous sensing duration before a sidelink on-duration active time of the second device, determine or select a first sidelink resource from a set of sidelink resources, derive or determine the set of sidelink resources based on at least a sensing result in the first contiguous sensing duration, and perform a first sidelink transmission on the first sidelink resource for transmitting the sidelink data to the second device.Type: GrantFiled: January 11, 2022Date of Patent: July 2, 2024Assignee: ASUSTek Computer Inc.Inventors: Ming-Che Li, Chun-Wei Huang, Li-Chih Tseng
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Patent number: 12025917Abstract: A method of supplying a chemical solution to a photolithography system. The chemical solution is pumped from a variable-volume buffer tank. The pumped chemical solution is dispensed in a spin-coater. The variable-volume buffer tank is refilled by emptying a storage container filled with the chemical solution into the variable-volume buffer tank.Type: GrantFiled: December 17, 2019Date of Patent: July 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Zhan Zhou, Heng-Jen Lee, Hsu-Yuan Liu, Yu-Chen Huang, Cheng-Han Wu, Shih-Che Wang, Ho-Yung David Hwang
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Publication number: 20240213186Abstract: An integrated fan-out (InFO) package includes a die, an encapsulant, and a horn antenna. The die has an active surface and a rear surface opposite to the active surface. The encapsulant laterally encapsulates the die. The horn antenna is electrically connected to the die. The horn antenna includes a top wall and a bottom wall respectively located on two opposite sides of the die and the encapsulant. A portion of the top wall is located within a span of the active surface of the die. A portion of the bottom wall is located within a span of the rear surface of the die.Type: ApplicationFiled: February 1, 2024Publication date: June 27, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chuei-Tang Wang, Tzu-Chun Tang, Chieh-Yen Chen, Che-Wei Hsu