Patents by Inventor Che Chan

Che Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145581
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN, Zheng-Yang PAN, Cheng-Po CHAU, Pin-Chu LIANG, Hung-Yao CHEN, De-Wei YU, Yi-Cheng LI
  • Patent number: 11954482
    Abstract: According to certain aspects, a computer-implemented method for operating an autonomous or semi-autonomous vehicle may be provided. With the customer's permission, an identity of a vehicle operator may be identified and a vehicle operator profile may be retrieved. Operating data regarding autonomous operation features operating the vehicle may be received from vehicle-mounted sensors. When a request to disable an autonomous feature is received, a risk level for the autonomous feature is determined and compared with a driver behavior setting for the autonomous feature stored in the vehicle operator profile. Based upon the risk level comparison, the autonomous vehicle retains control of vehicle or the autonomous feature is disengaged depending upon which is the safer driver—the autonomous vehicle or the vehicle human occupant. As a result, unsafe disengagement of self-driving functionality for autonomous vehicles may be alleviated.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: April 9, 2024
    Assignee: State Farm Mutual Automobile Insurance Company
    Inventors: Brian Mark Fields, Chien Che Huang, Mohamed A. Wazeer, Shawn C. Bennett, Steven Cielocha, Ronny S. Bryant, Stephen Kohaus, Terry Quakenbush, Richard A. Novak, Aaron Scott Chan, Craig M. Main, Weixin Wu, Torri Wollenschlager, Carol Marie Csanda, Stacey Gorsuch, Todd Binion
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Patent number: 11901442
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Wen Chiu, Yi Che Chan, Lun-Kuang Tan, Zheng-Yang Pan, Cheng-Po Chau, Pin-Chu Liang, Hung-Yao Chen, De-Wei Yu, Yi-Cheng Li
  • Patent number: 11854800
    Abstract: Embodiment methods for performing a high pressure anneal process during the formation of a semiconductor device, and embodiment devices therefor, are provided. The high pressure anneal process may be a dry high pressure anneal process in which a pressurized environment of the anneal includes one or more process gases. The high pressure anneal process may be a wet anneal process in which a pressurized environment of the anneal includes steam.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Szu-Ying Chen, Ya-Wen Chiu, Cheng-Po Chau, Yi Che Chan, Chih Ping Liao, YungHao Wang, Sen-Hong Syue
  • Publication number: 20230386832
    Abstract: Embodiment methods for performing a high pressure anneal process during the formation of a semiconductor device, and embodiment devices therefor, are provided. The high pressure anneal process may be a dry high pressure anneal process in which a pressurized environment of the anneal includes one or more process gases. The high pressure anneal process may be a wet anneal process in which a pressurized environment of the anneal includes steam.
    Type: Application
    Filed: August 4, 2023
    Publication date: November 30, 2023
    Inventors: Szu-Ying Chen, Ya-Wen Chiu, Cheng-Po Chau, Yi Che Chan, Chih Ping Liao, YungHao Wang, Sen-Hong Syue
  • Publication number: 20230369919
    Abstract: A coil module for an inductive power supply system includes a first coil, a processor and a control element. The processor, coupled to the first coil, is configured to detect a plurality of resonant frequencies of the first coil corresponding to a plurality of coordinate points, respectively. The control element, coupled to the processor, is configured to control the position of the first coil according to the plurality of resonant frequencies.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Applicant: Fu Da Tong Technology Co., Ltd.
    Inventors: Ming-Chiu Tsai, Chi-Che Chan
  • Patent number: 11733328
    Abstract: A signal analysis circuit for determining whether a supplying-end module of an induction type power supply system receives a modulation signal from a receiving-end module includes a signal receiving circuit, a gain amplifier, a ramp generator, a comparator, a timer and a processor. The signal receiving circuit is configured to obtain a coil signal on a supplying-end coil of the supplying-end module. The gain amplifier is configured to adjust a voltage level of the coil signal to generate an amplification signal. The ramp generator is configured to generate and output a ramp signal. The comparator is configured to compare the amplification signal with the ramp signal to determine a trigger time on which the amplification signal and the ramp signal intersect. The timer is configured to obtain a time data corresponding to the trigger time. The processor is configured to analyze the modulation signal according to the time data.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: August 22, 2023
    Assignee: Fu Da Tong Technology Co., Ltd.
    Inventors: Ming-Chiu Tsai, Chi-Che Chan
  • Publication number: 20230253246
    Abstract: In a method of manufacturing a semiconductor device, a source/drain structure is formed over a substrate, a first interlayer dielectric (ILD) layer including one or more dielectric layers is formed over the source/drain structure, a first opening is formed in the first ILD layer to at least partially expose the source/drain structure, a sacrificial layer is formed on an inner wall of the first opening, a first insulating layer is formed on the sacrificial layer, a conductive layer is formed on the first insulating layer so as to form a source/drain contact in contact with the source/drain structure, the sacrificial layer is removed to form a space between the first insulating layer and the first ILD layer, and a second insulating layer is formed over the source/drain contact and the first ILD layer to cap an upper opening the space, thereby forming an air gap.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Inventors: Yi-Hua CHENG, Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN
  • Patent number: 11677015
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ya-Wen Chiu, Yi Che Chan, Lun-Kuang Tan, Zheng-Yang Pan, Cheng-Po Chau, Pin-Ju Liang, Hung-Yao Chen, De-Wei Yu, Yi-Cheng Li
  • Patent number: 11631612
    Abstract: In a method of manufacturing a semiconductor device, a source/drain structure is formed over a substrate, a first interlayer dielectric (ILD) layer including one or more dielectric layers is formed over the source/drain structure, a first opening is formed in the first ILD layer to at least partially expose the source/drain structure, a sacrificial layer is formed on an inner wall of the first opening, a first insulating layer is formed on the sacrificial layer, a conductive layer is formed on the first insulating layer so as to form a source/drain contact in contact with the source/drain structure, the sacrificial layer is removed to form a space between the first insulating layer and the first ILD layer, and a second insulating layer is formed over the source/drain contact and the first ILD layer to cap an upper opening of the space, thereby forming an air gap.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: April 18, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Hua Cheng, Ya-Wen Chiu, Yi Che Chan, Lun-Kuang Tan
  • Publication number: 20220376091
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 24, 2022
    Inventors: Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN, Zheng-Yang PAN, Cheng-Po CHAU, Pin-Ju LIANG, Hung-Yao CHEN, De-Wei YU, Yi-Cheng LI
  • Publication number: 20220260618
    Abstract: A decoding method for a supplying-end module of an induction type power supply system where the supplying-end module includes a supplying-end coil is provided. The decoding method includes steps of: receiving and storing a plurality of trigger data, each corresponding to a resonant cycle of a coil signal on the supplying-end coil; determining a plurality of rising or falling features in the plurality of trigger data, and marking a plurality of anchor points at positions corresponding to the plurality of rising or falling features; determining whether distances between the plurality of anchor points comply with an encoding interval, to obtain a plurality of valid anchor points from the plurality of anchor points; and obtaining a plurality of data codes according to the plurality of valid anchor points.
    Type: Application
    Filed: May 3, 2022
    Publication date: August 18, 2022
    Applicant: Fu Da Tong Technology Co., Ltd.
    Inventors: Ming-Chiu Tsai, Chi-Che Chan
  • Publication number: 20210375665
    Abstract: In a method of manufacturing a semiconductor device, a source/drain structure is formed over a substrate, a first interlayer dielectric (ILD) layer including one or more dielectric layers is formed over the source/drain structure, a first opening is formed in the first ILD layer to at least partially expose the source/drain structure, a sacrificial layer is formed on an inner wall of the first opening, a first insulating layer is formed on the sacrificial layer, a conductive layer is formed on the first insulating layer so as to form a source/drain contact in contact with the source/drain structure, the sacrificial layer is removed to form a space between the first insulating layer and the first ILD layer, and a second insulating layer is formed over the source/drain contact and the first ILD layer to cap an upper opening the space, thereby forming an air gap.
    Type: Application
    Filed: March 10, 2021
    Publication date: December 2, 2021
    Inventors: Yi-Hua CHENG, Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN
  • Publication number: 20210359111
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Application
    Filed: December 2, 2020
    Publication date: November 18, 2021
    Inventors: Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN, Zheng-Yang PAN, Cheng-Po CHAU, Pin-Ju LIANG, Hung-Yao CHEN, De-Wei YU, Yi-Cheng LI
  • Patent number: 11128180
    Abstract: A method of detecting a receiving-end module, for a supplying-end module of an induction type power supply system where the supplying-end module includes a supplying-end coil, includes detecting the supplying-end coil to obtain a self-resonant frequency of the supplying-end coil; determining whether the self-resonant frequency is smaller than a basic frequency; obtaining a first output power corresponding to the self-resonant frequency when the self-resonant frequency is determined to be smaller than the basic frequency and the degree of the self-resonant frequency smaller than the basic frequency exceeds a threshold; and sending an activation signal with the first output power, and starting to supply electric power when a data code corresponding to the activation signal is received.
    Type: Grant
    Filed: December 10, 2017
    Date of Patent: September 21, 2021
    Assignee: Fu Da Tong Technology Co., Ltd.
    Inventors: Ming-Chiu Tsai, Chi-Che Chan
  • Patent number: D952551
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: May 24, 2022
    Assignee: SCHNEIDER ELECTRIC IT CORPORATION
    Inventors: Chung-Hui Chen, Chien-An Lee, Ming Che Chan, Shen-Yuan Chien, Tannan Whidden Winter
  • Patent number: D961511
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: August 23, 2022
    Assignee: SCHNEIDER ELECTRIC IT CORPORATION
    Inventors: Chung-Hui Chen, Chien-An Lee, Ming Che Chan, Shen-Yuan Chien, Tannan Whidden Winter
  • Patent number: D1003832
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: November 7, 2023
    Assignee: SCHNEIDER ELECTRIC IT CORPORATION
    Inventors: Chung-Hui Chen, Chien-An Lee, Ming Che Chan, Shen-Yuan Chien, Tannan Whidden Winter
  • Patent number: D1016738
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: March 5, 2024
    Assignee: SCHNEIDER ELECTRIC IT CORPORATION
    Inventors: Chung-Hui Chen, Chien-An Lee, Ming Che Chan, Shen-Yuan Chien, Tannan Whidden Winter