Patents by Inventor Che-Chih Hsu

Che-Chih Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973164
    Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 30, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen
  • Publication number: 20240096822
    Abstract: A package structure is provided. The package structure includes a first conductive pad in a first insulating layer, a conductive via in a second insulating layer directly under the first conductive pad, and a first under bump metallurgy structure directly under the first conductive via. In a first horizontal direction, the conductive via is narrower than the first under bump metallurgy structure, and the first under bump metallurgy structure is narrower than the first conductive pad.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Chia-Kuei HSU, Ming-Chih YEW, Shu-Shen YEH, Che-Chia YANG, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20230378244
    Abstract: A method of forming a semiconductor device is disclosed. The method includes forming a plurality of isolation regions on a semiconductor substrate, forming a protective layer in a resistor region of the semiconductor substrate, after forming the protective layer, etching a gate dielectric layer to form first and second gate dielectric layers of a transistor in a transistor region of the semiconductor substrate, removing the protective layer, forming first and second dummy gate stacks over the first and second gate dielectric layers, respectively, forming a resistor in the resistor region, forming third and fourth dummy gate stacks over the resistor, and replacing each of the first, second, third, and fourth dummy gate stacks with a conductive material.
    Type: Application
    Filed: May 20, 2022
    Publication date: November 23, 2023
    Inventors: Liang-Hsiang Chen, Chinyu Su, Che-Chih Hsu
  • Publication number: 20230223335
    Abstract: A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.
    Type: Application
    Filed: March 7, 2023
    Publication date: July 13, 2023
    Inventors: Hung Hsun LIN, Wei-Chun HUA, Wen-Chu HUANG, Yen-Yu CHEN, Che-Chih HSU, Chinyu SU, Wen Han HUNG
  • Patent number: 11616013
    Abstract: A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: March 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung Hsun Lin, Che-Chih Hsu, Wen-Chu Huang, Chinyu Su, Yen-Yu Chen, Wei-Chun Hua, Wen Han Hung
  • Publication number: 20220367343
    Abstract: A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 17, 2022
    Inventors: Hung Hsun Lin, Che-Chih Hsu, Wen-Chu Huang, Chinyu Su, Yen-Yu Chen, Wei-Chun Hua, Wen Han Hung
  • Patent number: 11393713
    Abstract: In a method of manufacturing a semiconductor device including a field effect transistor (FET), a sacrificial region is formed in a substrate, and a trench is formed in the substrate. A part of the sacrificial region is exposed in the trench. A space is formed by at least partially etching the sacrificial region, an isolation insulating layer is formed in the trench and the space, and a gate structure and a source/drain region are formed. An air spacer is formed in the space under the source/drain region.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: July 19, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Clement Hsinghen Wann, Chun Hsiung Tsai, Shahaji B. More, Che-Chih Hsu, Chinyu Su, Po-Han Tseng, Wen Han Hung, Chih-Hsin Ko, Yu-Ming Lin
  • Publication number: 20210391251
    Abstract: A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.
    Type: Application
    Filed: June 12, 2020
    Publication date: December 16, 2021
    Inventors: Hung Hsun Lin, Che-Chih Hsu, Wen-Chu Huang, Chinyu Su, Yen-Yu Chen, Wei-Chun Hua, Wen Han Hung
  • Publication number: 20200343127
    Abstract: In a method of manufacturing a semiconductor device including a field effect transistor (FET), a sacrificial region is formed in a substrate, and a trench is formed in the substrate. A part of the sacrificial region is exposed in the trench. A space is formed by at least partially etching the sacrificial region, an isolation insulating layer is formed in the trench and the space, and a gate structure and a source/drain region are formed. An air spacer is formed in the space under the source/drain region.
    Type: Application
    Filed: December 31, 2019
    Publication date: October 29, 2020
    Inventors: Clement Hsingjen WANN, Chun Hsiung TSAI, Shahaji B. MORE, Che-Chih HSU, Chinyu SU, Po-Han TSENG, Wen Han HUNG
  • Patent number: 8081552
    Abstract: A hologram disc reading and writing apparatus including a signal light source module, a beam splitter, a reference/reading light source, a reflector, and an optical reading head and a hologram disc reading apparatus are provided. A signal light beam emitted from the signal light source module is transmitted to a data region of a hologram disc through the beam splitter. The reference/reading light source, the signal light source module, and the optical reading head are disposed at the same side of the hologram disc. The reflector is disposed at the other side. A spherical wave light beam emitted from the reference/reading light source is transmitted through the data region and reflected by the reflector to form a phase conjugate light beam transmitted to and through the data region. The phase conjugate light beam is transformed to a data light beam transmitted to the optical reading head through the beam splitter.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: December 20, 2011
    Assignee: National Central University
    Inventors: Ching-Cherng Sun, Yeh-Wei Yu, Che-Chih Hsu, Tun-Chien Teng, Cheng-Hsien Chen
  • Publication number: 20100309768
    Abstract: A hologram disc reading and writing apparatus including a signal light source module, a beam splitter, a reference/reading light source, a reflector, and an optical reading head and a hologram disc reading apparatus are provided. A signal light beam emitted from the signal light source module is transmitted to a data region of a hologram disc through the beam splitter. The reference/reading light source, the signal light source module, and the optical reading head are disposed at the same side of the hologram disc. The reflector is disposed at the other side. A spherical wave light beam emitted from the reference/reading light source is transmitted through the data region and reflected by the reflector to form a phase conjugate light beam transmitted to and through the data region. The phase conjugate light beam is transformed to a data light beam transmitted to the optical reading head through the beam splitter.
    Type: Application
    Filed: November 16, 2009
    Publication date: December 9, 2010
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Ching-Cherng Sun, Yeh-Wei Yu, Che-Chih Hsu, Tun-Chien Teng, Cheng-Hsien Chen
  • Publication number: 20090322026
    Abstract: In a light emitting diode (LED) chess set, when a chess piece of the chess set is placed on a chessboard, a power supply element in the chessboard will supply power to an LED in the chess piece to emit light, so that the chess piece gives a light emitting effect. When a player removes a chess piece from a square of the chessboard for a next movement of the chess piece, a control element in the chessboard will identify an identification element of the chess piece through a sensing element on the square to determine the possible next movements of the chess piece on the chessboard and drive the LEDs in the corresponding squares of all suggested movements to emit light. The light-emitting square guides and suggests players to make the next movement of a chess piece and improve a beginner's memory on the rules of chess.
    Type: Application
    Filed: August 28, 2008
    Publication date: December 31, 2009
    Inventors: Ching-cherng Sun, Hsin-ying Ho, Che-chih Hsu, Chang-yu Tsai, Shih-kai Lin
  • Publication number: 20090272990
    Abstract: A light mixing apparatus of a light emitting diode (LED) is installed on a light emitting surface of the LED. The light emitted from the LED is mixed by a light mixing module of the light mixing apparatus uniformly for adjusting the light output angle. After the angle increases, the light is scattered into a fixed base of the light mixing apparatus, reflected to a containing groove of the light mixing apparatus by a reflecting layer of the fixed base, and guided into the total internal reflection lens of the containing groove. After the total internal reflection lens gathers the light, the light is projected onto a projected surface. If the LED is made of a multi-chip package, the light mixing apparatus can be used for improving the luminance of a light emitted by the LED onto the projected surface and the uniform distribution of the luminance.
    Type: Application
    Filed: June 17, 2008
    Publication date: November 5, 2009
    Inventors: Ching-cherng Sun, Hsin-ying Ho, Che-chih Hsu, Chng-yu Tsai
  • Publication number: 20090273289
    Abstract: A lamp unit includes a power cord having a mating plug at one end and a corresponding mating plug at the other end, a bulb seat, an LED holder, an LED, and a housing. The LED is mounted on the LED holder in a watertight fashion and the LED holder is mounted on the bulb seat in a watertight fashion so as to prevent water from getting in the bulb seat. The LED can be replaced with another LED capable of emitting light of different color. The housing can be replaced with another housing of different shape. The corresponding mating plug of one lamp unit is adapted to connect to the mating plug of another lamp unit so as to form an LED light string for decoration of any desired length. The invention is highly adaptable to be employed in different environments and events.
    Type: Application
    Filed: August 28, 2008
    Publication date: November 5, 2009
    Inventors: Ching-cherng Sun, Che-chih Hsu, Chang-yu Tsai