Abstract: A method of lithography process is provided. The method includes forming a conductive layer over a reticle. The method includes applying ionized particles to the reticle by a discharging device. The method includes forming a photoresist layer over a semiconductor substrate. The method includes securing the semiconductor substrate by a wafer electrostatic-clamp. The method also includes patterning the photoresist layer by emitting radiation from a radiation source via the reticle.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: A miniaturized dual-balanced mixer circuit based on a double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a double spiral layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.

Abstract: A miniaturized dual-balanced mixer circuit based on a multilayer double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a 3-dimensional double-spiral circuit layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.

Abstract: A miniaturized dual-balanced mixer circuit based on a trifilar layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a trifilar layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 20% of that of the conventional star-type DBM.

Abstract: A miniaturized multilayer hybrid-phase signal splitter circuit is proposed, which is fully equivalent in function to a conventional rat-race coupler, but with a specialized circuit layout structure that allows its IC implementation to be more miniaturized than the conventional rat-race coupler. The proposed hybrid-phase signal splitter circuit features the use of a multilayer substrate for the layout of six transmission lines in such a manner that the transmission lines in the middle layer are inductively coupled to the transmission lines on the overlying layer as well as the transmission lines on the underlying layer to form a Marchand balun. In IC implementation, the required layout area is only about 10% of the layout area for the conventional rat-race coupler.

Abstract: A miniaturized dual-balanced mixer circuit based on a multilayer double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a 3-dimensional double-spiral circuit layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.

Abstract: A miniaturized dual-balanced mixer circuit based on a double spiral layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a double spiral layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 15% of that of the conventional star-type DBM.

Abstract: A miniaturized dual-balanced mixer circuit based on a trifilar layout architecture is proposed, which is designed for use to provide a frequency mixing function for millimeter wave (MMW) signals, and which features a downsized circuit layout architecture that allows IC implementation to be more miniaturized than the conventional star-type dual-balanced mixer (DBM). The proposed miniaturized dual-balanced mixer circuit is distinguished from the conventional star-type DBM particularly in the use of a trifilar layout architecture for the layout of two balun circuit units. This feature allows the required layout area to be only about 20% of that of the conventional star-type DBM.

Abstract: A miniaturized multilayer hybrid-phase signal splitter circuit is proposed, which is fully equivalent in function to a conventional rat-race coupler, but with a specialized circuit layout structure that allows its IC implementation to be more miniaturized than the conventional rat-race coupler. The proposed hybrid-phase signal splitter circuit features the use of a multilayer substrate for the layout of six transmission lines in such a manner that the transmission lines in the middle layer are inductively coupled to the transmission lines on the overlying layer as well as the transmission lines on the underlying layer to form a Marchand balun. In IC implementation, the required layout area is only about 10% of the layout area for the conventional rat-race coupler.