Patents by Inventor Che Coi Leung

Che Coi Leung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Power pin to power pin electro-static discharge (ESD) clamp
    Patent number: 7529070
    Abstract: An ESD clamp circuit for use between separate power rails. An ESD clamp is based on a wide nMOSFET. A symmetrical circuit is designed vis-à-vis the two power rails, with respect to ground, allowing discharge of an ESD surge in both polarities of stress. An nMOSFET device drives the gate of a large nMOSFET (e.g., having a device width between 1000 and 10,000 microns). The large power rail-to-power rail nMOSFET has its gate controlled by the output inverter stage of either ESD detection circuit connected to a respective power supply rail. The gate is switched to a common ground during normal operation of the integrated circuit.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: May 5, 2009
    Assignee: Agere Systems Inc.
    Inventors: Dipankar Bhattacharya, John Kriz, Che Coi Leung, Duane J. Loeper, Yehuda Smooha