Patents by Inventor Che-Fu Chen

Che-Fu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837484
    Abstract: A method includes positioning an end effector at a height lower than a height of a wafer. The end effector is moved to a position under the wafer. A wafer backside property of the wafer is detected by using a sensor on the end effector. The wafer backside property is analyzed to obtain an analysis result.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Hua Houng, Che-Fu Chen
  • Publication number: 20230372960
    Abstract: A semiconductor process system includes a semiconductor process chamber having an interior volume. A pump extracts gases from the semiconductor process chamber via an outlet channel communicably coupled to the semiconductor process chamber. The system includes a plurality of fluid nozzles configured to prevent the backflow of particles from the outlet channel to interior volume by generating a fluid barrier within the outlet channel responsive to the pump ceasing to function.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Inventors: Kai-Chin WEI, Che-fu CHEN
  • Publication number: 20230360977
    Abstract: A method includes: transferring a wafer from a factory interface through a load lock chamber to a buffer chamber; transferring the wafer from the buffer chamber to a process chamber; etching the wafer in the process chamber, to remove a material of the wafer; and after the wafer is etched, performing reflectance measurements to the wafer in the factory interface, the load lock chamber, the buffer chamber, or combination thereof, to identify if the material of the wafer is removed entirely according to a reflectance of the wafer.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 9, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yan-Hong LIU, Daniel M.Y. YANG, Che-Fu CHEN
  • Patent number: 11779949
    Abstract: A semiconductor process system includes a semiconductor process chamber having an interior volume. A pump extracts gases from the semiconductor process chamber via an outlet channel communicably coupled to the semiconductor process chamber. The system includes a plurality of fluid nozzles configured to prevent the backflow of particles from the outlet channel to interior volume by generating a fluid barrier within the outlet channel responsive to the pump ceasing to function.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: October 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chin Wei, Che-fu Chen
  • Patent number: 11756840
    Abstract: A system includes a factory interface, an etching tool, and at least one measuring device. The factory interface is configured to carry a wafer. The etching tool is coupled to the factory interface and configured to process the wafer transferred from the factory interface. The at least one measuring device is equipped in the factory interface, the etching tool, or the combination thereof. The at least one measuring device is configured to perform real-time measurements of reflectance from the wafer that is carried in the factory interface or the etching tool.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yan-Hong Liu, Daniel M. Y. Yang, Che-Fu Chen
  • Publication number: 20230268427
    Abstract: A method, for making a semiconductor device, includes forming a first fin over a substrate. The method includes forming a dummy gate stack on the first fin. The method includes forming a first gate spacer along a side of the dummy gate stack. The first gate spacer includes a first dielectric material. The method includes forming a second gate spacer along a side of the first gate spacer. The second gate spacer includes a semiconductor material. The method includes forming a source/drain region in the first fin adjacent the second gate spacer. The method includes removing at least a portion of the second gate spacer to form a void extending between the first gate spacer and the source/drain region.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 24, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsu Ming Hsiao, Ming-Jhe Sie, Hsiu-Hao Tsao, Hong Pin Lin, Che-fu Chen, An Chyi Wei, Yi-Jen Chen
  • Patent number: 11710620
    Abstract: A semiconductor processing system processes semiconductor wafers in a process chamber. The process chamber includes semiconductor process equipment for performing semiconductor processes within the chamber. The process chamber includes a heat pipe integrated with one or more components of the process chamber. The heat pipe effectively transfers heat from within the chamber to an exterior of the chamber.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: July 25, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chin Wei, Che-fu Chen
  • Patent number: 11664260
    Abstract: In an embodiment, a system includes: an orientation sensor configured to detect an orientation fiducial on a bevel of a wafer; a pedestal configured to rotate the wafer to allow the orientation sensor to detect the orientation fiducial and place the orientation fiducial at a predetermined orientation position; and a defect sensor configured to detect a wafer defect along a surface of the wafer while rotated by the pedestal.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: May 30, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yan-Hong Liu, Daniel M. Y. Yang, Che-Fu Chen
  • Patent number: 11664265
    Abstract: In an embodiment, a robotic arm includes: a base; at least one link secured to the base; a gripper secured to the at least one link, wherein: the gripper comprises a finger, the gripper is configured to secure a wafer while the at least one link is in motion, and the gripper is configured to release the wafer while the at least one link is stopped, a sensor disposed on the finger, the sensor configured to collect sensor data characterizing the robotic arm's interaction with a semiconductor processing chamber while the wafer is secured using the finger.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: May 30, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yan-Hong Liu, Ming-Feng Chen, Che-fu Chen, Hung-Wen Chen
  • Patent number: 11664444
    Abstract: A method, for making a semiconductor device, includes forming a first fin over a substrate. The method includes forming a dummy gate stack on the first fin. The method includes forming a first gate spacer along a side of the dummy gate stack. The first gate spacer includes a first dielectric material. The method includes forming a second gate spacer along a side of the first gate spacer. The second gate spacer includes a semiconductor material. The method includes forming a source/drain region in the first fin adjacent the second gate spacer. The method includes removing at least a portion of the second gate spacer to form a void extending between the first gate spacer and the source/drain region.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: May 30, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsu Ming Hsiao, Ming-Jhe Sie, Hsiu-Hao Tsao, Hong Pin Lin, Che-Fu Chen, An Chyi Wei, Yi-Jen Chen
  • Publication number: 20230078610
    Abstract: The present disclosure describes an apparatus. The apparatus includes a chuck for placing an object thereon, a gas passage extending along a periphery of an outer sidewall of the chuck and separating the chuck into an inner portion and a sidewall portion, and a plurality of gas holes through the sidewall portion and configured to connect a gas external to the chuck to the gas passage.
    Type: Application
    Filed: November 1, 2022
    Publication date: March 16, 2023
    Applicant: Taiwan semiconductor Manufacturing Co., Ltd.
    Inventors: Ian HSIEH, Che-fu CHEN, Yan-Hong LIU
  • Patent number: 11600517
    Abstract: In an embodiment, a system includes: a gas distributor assembly configured to dispense gas into a chamber; and a chuck assembly configured to secure a wafer within the chamber, wherein at least one of the gas distributor assembly and the chuck assembly includes: a first portion comprising a convex protrusion, and a second portion comprising a concave opening, wherein the convex protrusion is configured to engage the concave opening.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: March 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo-Ru Chen, Yan-Hong Liu, Che-Fu Chen
  • Publication number: 20230060763
    Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure including sacrificial gate electrode is formed over a substrate. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The recessing the first dielectric layer comprises a first etching operation and a second etching operation using a different etching as from the first etching operation.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Hsu Ming HSIAO, Shen WANG, Kung Shu HSU, Hong LIN, Shiang-Bau WANG, Che-Fu CHEN
  • Patent number: 11521884
    Abstract: The present disclosure describes an apparatus. The apparatus includes a chuck for placing an object thereon, a gas passage extending along a periphery of an outer sidewall of the chuck and separating the chuck into an inner portion and a sidewall portion, and a plurality of gas holes through the sidewall portion and configured to connect a gas external to the chuck to the gas passage.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: December 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ian Hsieh, Che-fu Chen, Yan-Hong Liu
  • Publication number: 20220367237
    Abstract: The present disclosure describes a method that prevents pre-mature dc-chucking in processing modules. The method includes placing a wafer onto a chuck equipped with lift pins. One or more of the lift pins include a pressure sensor configured to measure a pressure exerted by the wafer. The method further includes measuring a first pressure applied to the one or more lift pins by the wafer, lowering the lift pins to place the wafer on the chuck, and processing the wafer. The method also includes removing the wafer from the chuck by pressing the one or more lift pins against the wafer to measure a second pressure exerted by the wafer. If the measured second pressure is equal to the first pressure, the method raises the wafer using the lift pins above the chuck.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yan-Hong LIU, Che-fu Chen
  • Publication number: 20220355346
    Abstract: The present disclosure describes a chuck-based device and a method for cleaning a semiconductor manufacturing system. The semiconductor manufacturing system can include a chamber, a chuck housed in the chamber and configured to hold a substrate, and a control device configured to control a translational displacement and a rotation of the chuck. The chuck can include a passage extending along a periphery of the chuck and dividing the chuck into an inner portion and an outer sidewall portion, and a first multiple of openings through the outer sidewall portion of the chuck and interconnected with the passage. The passage can be configured to transport a fluid. The first multiple of openings can be configured to dispense the fluid.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 10, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ian HSIEH, Che-fu CHEN
  • Publication number: 20220359262
    Abstract: In an embodiment, a system includes: a gas distributor assembly configured to dispense gas into a chamber; and a chuck assembly configured to secure a wafer within the chamber, wherein at least one of the gas distributor assembly and the chuck assembly includes: a first portion comprising a convex protrusion, and a second portion comprising a concave opening, wherein the convex protrusion is configured to engage the concave opening.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 10, 2022
    Inventors: Bo-Ru CHEN, Yan-Hong LIU, Che-Fu CHEN
  • Patent number: 11456203
    Abstract: The present disclosure describes a method that prevents pre-mature de-chucking in processing modules. The method includes placing a wafer onto a chuck equipped with lift pins. One or more of the lift pins include a pressure sensor configured to measure a pressure exerted by the wafer. The method further includes measuring a first pressure applied to the one or more lift pins by the wafer, lowering the lift pins to place the wafer on the chuck, and processing the wafer. The method also includes removing the wafer from the chuck by pressing the one or more lift pins against the wafer to measure a second pressure exerted by the wafer. If the measured second pressure is equal to the first pressure, the method raises the wafer using the lift pins above the chuck.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Yan-Hong Liu, Che-Fu Chen
  • Patent number: 11443966
    Abstract: Systems, apparatuses, and methods are provided for predicting or determining irregular processing parameters during processing of a semiconductor wafer in a semiconductor processing apparatus, such as an etching apparatus. A semiconductor processing apparatus includes a load port that is configured to receive a semiconductor wafer. A process chamber is coupled to the load port, and a fan is configured to selectively vary a flow of fluid in the process chamber. One or more sensors are provided in the process chamber and are configured to sense one or more processing parameters in the process chamber. A controller is coupled to the one or more sensors and to the fan, and the controller is configured to control the fan to vary the flow of fluid in the process chamber based on the sensed one or more processing parameters.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: September 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chin Wei, Che-fu Chen
  • Patent number: 11211232
    Abstract: The present disclosure describes a chuck-based device and a method for cleaning a semiconductor manufacturing system. The semiconductor manufacturing system can include a chamber with the chuck-based device configured to clean the chamber, a loading port coupled to the chamber and configured to hold one or more wafer storage devices, and a control device configured to control a translational displacement and a rotation of the chuck-based device. The chuck-based device can include a based stage, one or more supporting rods disposed at the base stage and configured to be vertically extendable or retractable, and a padding film disposed on the one or more supporting rods.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: December 28, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ian Hsieh, Che-fu Chen, Yan-Hong Liu