Patents by Inventor Che-Hao Liao
Che-Hao Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240143053Abstract: A mainboard device and an update method of the basic input-output system thereof are provided. The mainboard device includes a flash memory, a universal serial bus (USB) port, and a microprocessor. The code of the basic input-output system is stored in the flash memory. The USB port is connected to an external USB device, wherein the external USB device includes a supply power and stores an update code. The microprocessor includes a power-switching device coupled to the system power and the USB port. When the power-switching device detects that the system power does not provide power and the USB port is provided with the supply power, the microprocessor provides power to the flash memory based on the supply power, and the microprocessor accesses the update code of the external USB device to perform an update operation on the code in the flash memory.Type: ApplicationFiled: September 22, 2023Publication date: May 2, 2024Inventors: Keng Hao Hsu, Che Min Liao
-
Patent number: 11736856Abstract: An earphone device includes a speaker unit, an inner housing body and an outer housing body. The inner housing body covers the speaker unit through an insert molding technique. The outer housing body covers the inner housing body through the insert molding technique.Type: GrantFiled: October 26, 2021Date of Patent: August 22, 2023Assignee: Jabil Circuit (Singapore) Pte. Ltd.Inventors: Wen-Hong Wang, Ching-Feng Lin, Chia-Chien Chen, Po-Cheng Huang, Shih-Hsien Yang, Cheng-Kun Chiang, Ching-Hsin Chen, Ching-Chieh Lin, Che-Hao Liao
-
Publication number: 20220141570Abstract: An earphone device includes a speaker unit, an inner housing body and an outer housing body. The inner housing body covers the speaker unit through an insert molding technique. The outer housing body covers the inner housing body through the insert molding technique.Type: ApplicationFiled: October 26, 2021Publication date: May 5, 2022Applicant: Jabil Circuit (Singapore) Pte. Ltd.Inventors: Wen-Hong Wang, Ching-Feng Lin, Chia-Chien Chen, Po-Cheng Huang, Shih-Hsien Yang, Cheng-Kun Chiang, Ching-Hsin Chen, Ching-Chieh Lin, Che-Hao Liao
-
Publication number: 20220076950Abstract: A method for forming a semiconductor device with a group-III oxide active layer including at least two group-III materials is provided. A group-III oxide substrate is provided and a group-III oxide active layer including at least one group-III material on the group-III oxide substrate is formed on the group-III oxide substrate. A group-III material in the group-III oxide substrate is different from the at least one group-III material in the group-III oxide active layer. The group-III oxide active layer including at least one group-III material and the group-III oxide substrate are annealed at a temperature greater than or equal to 1,000° C. so that the group-III material in the group-III oxide substrate diffuses into the group-III oxide active layer to form the group-III oxide active layer including the at least two group-III materials.Type: ApplicationFiled: January 14, 2020Publication date: March 10, 2022Inventors: Xiaohang LI, Che-Hao LIAO
-
Patent number: 9478701Abstract: A semiconductor light-emitting device including a substrate, a first-type doped semiconductor structure, a light-emitting layer, and a second-type doped semiconductor layer is provided. The first-type doped semiconductor structure is located on the substrate and includes a base and multi-section rod structures extended upward from the base. Each multi-section rod structure includes rods and at least one connecting portion. The connecting portion connects adjacent rods along a first direction, wherein the first direction is perpendicular to the base and points to the connecting portion from the base. Cross-section areas of different rods on a reference plane parallel to the substrate are different, and cross-section areas of the connecting portion on the reference plane decrease along the first direction. The light-emitting layer is located on sidewalls of the rods. The second-type doped semiconductor layer is located on the light-emitting layer.Type: GrantFiled: April 30, 2014Date of Patent: October 25, 2016Assignee: National Taiwan UniversityInventors: Chih-Chung Yang, Che-Hao Liao, Charng-Gan Tu, Horng-Shyang Chen, Chia-Ying Su
-
Publication number: 20150263227Abstract: A semiconductor light-emitting device including a substrate, a first-type doped semiconductor structure, a light-emitting layer, and a second-type doped semiconductor layer is provided. The first-type doped semiconductor structure is located on the substrate and includes a base and multi-section rod structures extended upward from the base. Each multi-section rod structure includes rods and at least one connecting portion. The connecting portion connects adjacent rods along a first direction, wherein the first direction is perpendicular to the base and points to the connecting portion from the base. Cross-section areas of different rods on a reference plane parallel to the substrate are different, and cross-section areas of the connecting portion on the reference plane decrease along the first direction. The light-emitting layer is located on sidewalls of the rods. The second-type doped semiconductor layer is located on the light-emitting layer.Type: ApplicationFiled: April 30, 2014Publication date: September 17, 2015Applicant: National Taiwan UniversityInventors: Chih-Chung Yang, Che-Hao Liao, Charng-Gan Tu, Horng-Shyang Chen, Chia-Ying Su
-
Patent number: 8759814Abstract: A semiconductor light-emitting device and a manufacturing method thereof are provided, wherein the semiconductor light-emitting device includes a first type doped semiconductor structure, a light-emitting layer, a second type doped semiconductor layer, a first conductive layer and a dielectric layer. The first type doped semiconductor structure includes a base and a plurality of columns extending outward from the base. Each of the columns includes a top surface and a plurality of sidewall surfaces. The light-emitting layer is disposed on the sidewall surfaces and the top surface, wherein the surface area of the light-emitting layer gradually changes from one side adjacent to the columns to a side away from the columns. The dielectric layer exposes the first conductive layer locating on the top surface of each of the columns, wherein the dielectric layer includes at least one of a plurality of quantum dots, phosphors, and metal nanoparticles.Type: GrantFiled: September 13, 2012Date of Patent: June 24, 2014Assignee: National Taiwan UniversityInventors: Chih-Chung Yang, Che-Hao Liao, Shao-Ying Ting, Horng-Shyang Chen, Wen-Ming Chang, Yu-Feng Yao, Chih-Yen Chen, Hao-Tsung Chen
-
Patent number: 8753559Abstract: A fabrication method of nanoparticles is provided. A substrate having a plurality of pillar structures is provided and then a plurality of ring structures is formed to surround the plurality of the pillar structures. The inner wall of each ring structure surrounds the sidewall of each pillar structure. A portion of each pillar structure is removed to reduce the height of each pillar structure and to expose the inner wall of each ring structure. The ring structures are separated from the pillar structures to form a plurality of nanoparticles. Surface modifications are applied to the ring structures before the ring structures are separated from the pillar structures on the substrate.Type: GrantFiled: June 21, 2012Date of Patent: June 17, 2014Assignee: National Taiwan UniversityInventors: Chih-Chung Yang, Hung-Yu Tseng, Wei-Fang Chen, Che-Hao Liao, Yu-Feng Yao
-
Publication number: 20140042387Abstract: A semiconductor light-emitting device and a manufacturing method thereof are provided, wherein the semiconductor light-emitting device includes a first type doped semiconductor structure, a light-emitting layer, a second type doped semiconductor layer, a first conductive layer and a dielectric layer. The first type doped semiconductor structure includes a base and a plurality of columns extending outward from the base. Each of the columns includes a top surface and a plurality of sidewall surfaces. The light-emitting layer is disposed on the sidewall surfaces and the top surface, wherein the surface area of the light-emitting layer gradually changes from one side adjacent to the columns to a side away from the columns. The dielectric layer exposes the first conductive layer locating on the top surface of each of the columns, wherein the dielectric layer includes at least one of a plurality of quantum dots, phosphors, and metal nanoparticles.Type: ApplicationFiled: September 13, 2012Publication date: February 13, 2014Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Chih-Chung Yang, Che-Hao Liao, Shao-Ying Ting, Horng-Shyang Chen, Wen-Ming Chang, Yu-Feng Yao, Chih-Yen Chen, Hao-Tsung Chen
-
Publication number: 20130285267Abstract: A fabrication method of nanoparticles is provided. A substrate having a plurality of pillar structures is provided and then a plurality of ring structures is formed to surround the plurality of the pillar structures. The inner wall of each ring structure surrounds the sidewall of each pillar structure. A portion of each pillar structure is removed to reduce the height of each pillar structure and to expose the inner wall of each ring structure. The ring structures are separated from the pillar structures to form a plurality of nanoparticles. Surface modifications are applied to the ring structures before the ring structures are separated from the pillar structures on the substrate.Type: ApplicationFiled: June 21, 2012Publication date: October 31, 2013Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Chih-Chung Yang, Hung-Yu Tseng, Wei-Fang Chen, Che-Hao Liao, Yu-Feng Yao
-
Publication number: 20130256650Abstract: A semiconductor device and fabrication method thereof are provided, wherein the fabrication method of the semiconductor device includes the following steps. Forming a semiconductor layer on a substrate, wherein the semiconductor layer has a top surface and a bottom surface that is opposite to the top surface. The bottom surface is in contact with the substrate, and the top surface has a plurality of pits, the pits are extended from the top surface toward the bottom surface. Preparing a solution, wherein the solution includes a plurality of nanoparticles. Filling the nanoparticles into the pits. Forming a conducting layer on the semiconductor layer after filling the nanoparticles into the pits.Type: ApplicationFiled: May 27, 2012Publication date: October 3, 2013Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Chih-Chung Yang, Horng-Shyang Chen, Shao-Ying Ting, Che-Hao Liao, Chih-Yen Chen, Chieh Hsieh, Hao-Tsung Chen, Yu-Feng Yao, Dong-Ming Yeh
-
Patent number: 8153457Abstract: The invention provides a method for forming a light emitting device. A first substrate is provided. A plurality of patterned masks is formed on the first substrate, or on a semiconductor epitaxial layer grown on the first substrate, or the first substrate is etched to form a plurality of trenches, followed by performing an epitaxial lateral overgrowth process to grow an epitaxy layer over the first substrate. A light emitting structure is formed on the epitaxy layer. A first electrode layer is formed on the light emitting structure. The light emitting structure is wafer bonded to a second substrate. A photoelectrochemical etching process is performed to lift off the first substrate from the epitaxy layer.Type: GrantFiled: March 15, 2011Date of Patent: April 10, 2012Assignee: National Taiwan UniversityInventors: Chih-Chung Yang, Cheng-Hung Lin, Chih-Yen Chen, Che-Hao Liao, Chieh Hsieh
-
Publication number: 20120070922Abstract: The invention provides a method for forming a light emitting device. A first substrate is provided. A plurality of patterned masks is formed on the first substrate, or on a semiconductor epitaxial layer grown on the first substrate, or the first substrate is etched to form a plurality of trenches, followed by performing an epitaxial lateral overgrowth process to grow an epitaxy layer over the first substrate. A light emitting structure is formed on the epitaxy layer. A first electrode layer is formed on the light emitting structure. The light emitting structure is wafer bonded to a second substrate. A photoelectrochemical etching process is performed to lift off the first substrate from the epitaxy layer.Type: ApplicationFiled: March 15, 2011Publication date: March 22, 2012Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Chih-Chung YANG, Cheng-Hung LIN, Chih-Yen CHEN, Che-Hao LIAO, Chieh HSIEH
-
Publication number: 20110175126Abstract: A light emitting diode device is provided, which comprises a substrate comprising a first growth surface and a bottom surface opposite to the first growth surface; a dielectric layer with a plurality of openings therein formed on the first growth surface; a plurality of semiconductor nano-scaled structures formed on the substrate protruding through the openings; a layer formed on the plurality of semiconductor nano-scaled structures with a second growth surface substantially parallel with the bottom surface; a light emitting diode structure formed on the second growth surface; wherein the diameters of the openings are smaller than 250 nm, and wherein the diameters of the plurality semiconductor nano-scaled structures are larger than the diameters of the corresponding openings.Type: ApplicationFiled: January 18, 2011Publication date: July 21, 2011Inventors: Hung-Chih YANG, Ming-Chi Hsu, Ta-Cheng Hsu, Chih-Chung Yang, Tsung-Yi Tang, Yung-Sheng Chen, Wen-Yu Shiao, Che-Hao Liao, Yu-Jiun Shen, Sheng-Horng Yen