Patents by Inventor CHE-HSIANG HSUEH

CHE-HSIANG HSUEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor structure and manufacturing method thereof
    Patent number: 10784150
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: September 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Chung Su, Jiech-Fun Lu, Jian Wu, Che-Hsiang Hsueh, Ming-Chi Wu, Chi-Yuan Wen, Chun-Chieh Fang, Yu-Lung Yeh
  • SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20190252241
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Application
    Filed: April 25, 2019
    Publication date: August 15, 2019
    Inventors: Ching-Chung SU, Jiech-Fun LU, Jian WU, Che-Hsiang HSUEH, Ming-Chi WU, Chi-Yuan WEN, Chun-Chieh FANG, Yu-Lung YEH
  • Semiconductor structure and manufacturing method thereof
    Patent number: 10276427
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Ching-Chung Su, Jiech-Fun Lu, Jian Wu, Che-Hsiang Hsueh, Ming-Chi Wu, Chi-Yuan Wen, Chun-Chieh Fang, Yu-Lung Yeh
  • SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20180277420
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Application
    Filed: May 25, 2018
    Publication date: September 27, 2018
    Inventors: Ching-Chung SU, Jiech-Fun LU, Jian WU, Che-Hsiang HSUEH, Ming-Chi WU, Chi-Yuan WEN, Chun-Chieh FANG, Yu-Lung YEH
  • Semiconductor structure and manufacturing method thereof
    Patent number: 9984918
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: May 29, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Chung Su, Jiech-Fun Lu, Jian Wu, Che-Hsiang Hsueh, Ming-Chi Wu, Chi-Yuan Wen, Chun-Chieh Fang, Yu-Lung Yeh
  • SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20170194190
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 6, 2017
    Inventors: CHING-CHUNG SU, JIECH-FUN LU, JIAN WU, CHE-HSIANG HSUEH, MING-CHI WU, CHI-YUAN WEN, CHUN-CHIEH FANG, YU-LUNG YEH