Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: A portable device for receiving broadcast information is provided. A mixer down-converts a radio-frequency signal with a local oscillation clock to provide an intermediate frequency signal. A filter is arranged to filter the intermediate frequency signal. An analog-to-digital converter converts the filtered intermediate frequency signal into a digital signal according to a sampling rate. The broadcast information is obtained according to the digital signal. The local oscillation clock has a first frequency in a normal mode and a second frequency in a power-saving mode, and the second frequency is lower than the first frequency.

Abstract: A complex filter for processing an in-phase signal and a quadrature-phase signal includes a first low-pass filter, a second low-pass filter, a connection unit between the first low-pass filter and the second low-pass filter, a first compensation resistor and a second compensation resistor. The first compensation resistor and the second compensation resistor are interlacedly coupled to input resistors of the first low-pass filter and the second low-pass filter.

Abstract: A device and method for DC offset cancellation device are disclosed. The method includes keeping a high pass module at off state, converting an analog radio frequency signal to a digital baseband signal by a direct down conversion receiving module, detecting a DC offset value during the conversion by an offset compensation module so as to provide an offset compensation signal corresponding to the DC offset value to the direct down conversion receiving module, and determining whether a control condition is reached by a control module so as to timely switch on the high pass module for canceling the residual DC offset in the direct down conversion receiving module. In the present invention, the offset compensation module provides preliminary offset compensation signals and then the high pass module accurately cancels residual DC offset, thereby significantly reducing the reaction time for DC offset cancellation.

Abstract: A complex filter for processing an in-phase signal and a quadrature-phase signal includes a first low-pass filter, a second low-pass filter, a connection unit between the first low-pass filter and the second low-pass filter, a first compensation resistor and a second compensation resistor.

Abstract: A device and method for DC offset cancellation device are disclosed. The method includes keeping a high pass module at off state, converting an analog radio frequency signal to a digital baseband signal by a direct down conversion receiving module, detecting a DC offset value during the conversion by an offset compensation module so as to provide an offset compensation signal corresponding to the DC offset value to the direct down conversion receiving module, and determining whether a control condition is reached by a control module so as to timely switch on the high pass module for canceling the residual DC offset in the direct down conversion receiving module. In the present invention, the offset compensation module provides preliminary offset compensation signals and then the high pass module accurately cancels residual DC offset, thereby significantly reducing the reaction time for DC offset cancellation.

Abstract: A power amplifier amplifying an input signal is provided, comprising a power amplifier circuit, a bias circuit, and a compensation circuit. The power amplifier circuit has an input impedance responsive to the input signal, and amplifies the input signal to generate an output signal. The bias circuit is coupled to the power amplifier circuit, generates a DC bias signal to the power amplifier so that the power amplifier amplifies the input signal. The compensation circuit is coupled to the power amplifier circuit, provides a compensation impedance responsive to the input signal such that a combination of the input impedance and the compensation impedance is substantially constant regardless of the input signal.

Abstract: A power amplifier amplifying an input signal is provided, comprising a power amplifier circuit, a bias circuit, and a compensation circuit. The power amplifier circuit has an input impedance responsive to the input signal, and amplifies the input signal to generate an output signal. The bias circuit is coupled to the power amplifier circuit, generates a DC bias signal to the power amplifier so that the power amplifier amplifies the input signal. The compensation circuit is coupled to the power amplifier circuit, provides a compensation impedance responsive to the input signal such that a combination of the input impedance and the compensation impedance is substantially constant regardless of the input signal.

Abstract: A power amplifier circuit amplifying an input signal to an output signal and a method thereof. The power amplifier circuit comprises a ramp controller, a current source, and a first amplification stage. The ramp controller receives an enable signal to generate a ramp signal. The current source is coupled to the ramp controller, produces a ramp current by the ramp signal. The first amplification stage is coupled to the current source, comprises a first supply voltage input coupled to a fixed supply voltage, and is biased by the ramp current to amplify the input signal such that an envelope of the output signal is a ramp.

Abstract: A power amplifier circuit amplifying an input signal to an output signal and a method thereof. The power amplifier circuit comprises a ramp controller, a current source, and a first amplification stage. The ramp controller receives an enable signal to generate a ramp signal. The current source is coupled to the ramp controller, produces a ramp current by the ramp signal. The first amplification stage is coupled to the current source, comprises a first supply voltage input coupled to a fixed supply voltage, and is biased by the ramp current to amplify the input signal such that an envelope of the output signal is a ramp.