Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: An apparatus may include a heat pipe with a first portion residing in a first plane, a second portion residing in the first plane and a third portion positioned between the first portion and the second portion, the third portion residing in a second plane spaced-apart from the first plane. The apparatus further includes a base plate including an opening and a clip plate having a first region, a second region and a third region positioned between the first and the second regions. The third portion of the heat pipe is positioned within the opening, and the clip plate is coupled to the base plate such that i) the third region of the clip plate is in superimposition with the third portion of the heat pipe and ii) third region of the clip plate resides in the first plane.

Abstract: A circuit board includes a first layer, a second layer, a third layer, a plurality of plating through holes, at least one first intermediate layer and at least one second intermediate layer. The first layer and the second layer are used as reference voltage planes. A plurality of transmission wires are disposed on the third layer. The transmission wires are coupled to a wireless signal transceiver and a plurality of antenna arrays; wherein the third layer is disposed between the first layer and the second layer. The plating through holes are disposed at sides of the third layer, wherein the plurality of plating through holes are configured to connect the first reference voltage plane with the second reference voltage plane. The first intermediate layer is disposed between the first layer and the third layer, and the second intermediate layer is disposed between the second layer and the third layer.

Abstract: A circuit board includes a first layer, a second layer, a third layer, a plurality of plating through holes, at least one first intermediate layer and at least one second intermediate layer. The first layer and the second layer are used as reference voltage planes. A plurality of transmission wires are disposed on the third layer. The transmission wires are coupled to a wireless signal transceiver and a plurality of antenna arrays; wherein the third layer is disposed between the first layer and the second layer. The plating through holes are disposed at sides of the third layer, wherein the plurality of plating through holes are configured to connect the first reference voltage plane with the second reference voltage plane. The first intermediate layer is disposed between the first layer and the third layer, and the second intermediate layer is disposed between the second layer and the third layer.

Abstract: A common mode filter is disposed on a circuit board. A signal layer of the circuit board has a differential signal wire pair. The common mode filter has a slot structure and a filtering frequency adjusting device. The slot structure is formed on a reference voltage layer of the circuit board, wherein the slot structure surrounds the differential signal wire pair. The filtering frequency adjusting device is disposed on a corner part of the slot structure, wherein the filtering frequency adjusting device includes at least one of at least one capacitor and at least one inductor, and is disposed on the circuit board across the differential signal wire pair.

Abstract: A common mode filter is disposed on a circuit board. A signal layer of the circuit board has a differential signal wire pair. The common mode filter has a slot structure and a filtering frequency adjusting device. The slot structure is formed on a reference voltage layer of the circuit board, wherein the slot structure surrounds the differential signal wire pair. The filtering frequency adjusting device is disposed on a corner part of the slot structure, wherein the filtering frequency adjusting device includes at least one of at least one capacitor and at least one inductor, and is disposed on the circuit board across the differential signal wire pair.

Abstract: A circuit board structure and a layout structure thereof are proposed. The layout structure includes at least one signal transmission line, at least one bonding pad, and at least one impedance adjusting wire. The signal transmission line, the bonding pad, and the impedance adjusting wire are disposed on a first circuit board. The impedance adjusting wire is electrically connected between the signal transmission line and the bonding pad. The impedance adjusting wire is disposed along a periphery of the bonding pad, and at least partially surrounds the bonding pad.

Abstract: A circuit including a grounding layer, a pair of signal lines and an insulating layer is provided. The grounding layer has a void region. The void region includes a first straight line part, a second straight line part and a third straight line part. The second straight line part and the third straight line part are connected to two ends of the first straight line part. An orthogonal projection of the pair of signal lines on the grounding layer crosses the first straight line part. The insulating layer is disposed between the grounding layer and the pair of signal lines and separates the grounding layer from the pair of signal lines.

Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.

Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.

Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.

Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.

Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.

Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.

Abstract: A remote console is used to control power-on processes of a plurality of computers connected to a network. The remote console has an input device for generating an input control signal of the power-on process for the computer, an output device for displaying a corresponding output video signal of the power-on process for the computer, and a remote console manager for processing signals of the computer and controlling operations of the computer. The remote console manager has an output receiving module for receiving output video data from the computer via the network, a second conversion module for converting the generated input control signal into input control data and restoring the output video data to the corresponding output video signal, and an input transferring module for transferring the input control data to the computer via the network.

Abstract: A substrate unit has a first surface and a corresponding second surface, and a plurality of nodes and at least a die pad are formed on the first surface of the substrate unit. A plurality of external nodes is formed on the second surface of the substrate unit, and the external nodes are electrically connected to the nodes. A multimedia chip has an active surface and a corresponding back surface, and a plurality of bonding pads are formed on the active surface of the multimedia chip. The back surface of the multimedia chip is adhered on the die pad of the substrate unit. A molding compound encapsulates the multimedia chip, the first surface of the substrate unit, and the conductive wires, and exposes the second surface of the substrate unit and the external nodes.

Abstract: A substrate unit has a first surface and a corresponding second surface, and a plurality of nodes and at least a die pad are formed on the first surface of the substrate unit. A plurality of external nodes is formed on the second surface of the substrate unit, and the external nodes are electrically connected to the nodes. A multimedia chip has an active surface and a corresponding back surface, and a plurality of bonding pads are formed on the active surface of the multimedia chip. The back surface of the multimedia chip is adhered on the die pad of the substrate unit. A molding compound encapsulates the multimedia chip, the first surface of the substrate unit, and the conductive wires, and exposes the second surface of the substrate unit and the external nodes.

Abstract: A substrate unit has a first surface and a corresponding second surface, and a plurality of nodes and at least a die pad are formed on the first surface of the substrate unit. A plurality of external nodes is formed on the second surface of the substrate unit, and the external nodes are electrically connected to the nodes. A multimedia chip has an active surface and a corresponding back surface, and a plurality of bonding pads are formed on the active surface of the multimedia chip. The back surface of the multimedia chip is adhered on the die pad of the substrate unit. A molding compound encapsulates the multimedia chip, the first surface of the substrate unit, and the conductive wires, and exposes the second surface of the substrate unit and the external nodes.

Abstract: A method for fabricating a ground-ball bonding structure on a TBGA package is proposed, which is characterized by the forming of a plurality of air vents around the ground-ball pad and cut all the way into the tape until reaching the bottommost surface of the tape. During solder-reflow process, this allows the trapped air in the via hole due to solder material being filled into the via hole to the outside atmosphere during solder-reflow process. Compared to the prior art, since the proposed method allows substantially no air-filled voids to be left in the via hole, the resulted ground ball would be fully collapsed against the heat sink and therefore coplanarized with respect to the signal ball. The coplanarity of the overall ball grid array would allow the TBGA package to be mounted properly onto a printed circuit board during SMT (Surface Mount Technology) process.