Patents by Inventor Che-Kai Lin

Che-Kai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12237382
    Abstract: A semiconductor device includes: a substrate; a channel layer disposed on the substrate, wherein the channel layer is made of GaN; a barrier layer disposed on the channel layer, wherein the barrier layer is made of AlzGa1-zN; and an inserting structure inserted between the channel layer and the barrier layer. The inserting structure includes: a first inserting layer disposed on the channel layer, wherein the first inserting layer is made of AlxGa1-xN; and a second inserting layer disposed on the first inserting layer, wherein the second inserting layer is made of AlyGa1-yN, and y is greater than x. The semiconductor device further includes: a gate electrode disposed on the barrier layer; a source electrode and a drain electrode disposed on the barrier layer and respectively at opposite sides of the gate electrode; and a spike region formed below at least one of the source electrode and the drain electrode.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: February 25, 2025
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Chieh-Chih Huang, Yan-Cheng Lin, Cheng-Kuo Lin, Wei-Chou Wang, Che-Kai Lin, Jiun-De Wu
  • Publication number: 20220406905
    Abstract: A semiconductor device includes: a substrate; a channel layer disposed on the substrate, wherein the channel layer is made of GaN; a barrier layer disposed on the channel layer, wherein the barrier layer is made of AlzGa1-zN; and an inserting structure inserted between the channel layer and the barrier layer. The inserting structure includes: a first inserting layer disposed on the channel layer, wherein the first inserting layer is made of AlxGa1-xN; and a second inserting layer disposed on the first inserting layer, wherein the second inserting layer is made of AlyGa1-yN, and y is greater than x. The semiconductor device further includes: a gate electrode disposed on the barrier layer; a source electrode and a drain electrode disposed on the barrier layer and respectively at opposite sides of the gate electrode; and a spike region formed below at least one of the source electrode and the drain electrode.
    Type: Application
    Filed: May 30, 2022
    Publication date: December 22, 2022
    Inventors: Chieh-Chih HUANG, Yan-Cheng LIN, Cheng-Kuo LIN, Wei-Chou WANG, Che-Kai LIN
  • Patent number: 10886392
    Abstract: A semiconductor structure for improving the thermal stability and Schottky behavior by engineering the stress in a III-nitride semiconductor, comprising a III-nitride semiconductor and a gate metal layer. The III-nitride semiconductor has a top surface on which a conductive area and a non-conductive area are defined. The gate metal layer is formed directly on the top surface of the III-nitride semiconductor and comprises a gate connection line and at least one gate contact extending from the gate connection line in a second direction perpendicular to the length of the gate connection line. The at least one gate contact forms a Schottky contact with the III-nitride semiconductor on the conductive area, and the gate connection line is in direct contact with the III-nitride semiconductor on the non-conductive area. The non-conductive area of the III-nitride semiconductor is at least partially covered by the gate connection line.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: January 5, 2021
    Assignee: Win Semiconductors Corp.
    Inventors: Jhih-Han Du, Yi Wei Lien, Che-Kai Lin, Wei-Chou Wang
  • Publication number: 20200303532
    Abstract: A GaN-based field effect transistor comprises a semiconductor substrate, an epitaxial structure formed on the semiconductor substrate, a source electrode, a drain electrode, and a gate electrode. The epitaxial structure comprises a buffer layer, a channel layer, a spacer layer, an n-type doped barrier layer, a barrier layer, and a capping layer, sequentially. The epitaxial structure has a source recess and a drain recess. A bottom of the source recess is defined by the n-type doped barrier layer or the spacer layer. A bottom of the drain recess is defined by the n-type doped barrier layer or the spacer layer. The source electrode is formed in the source recess. The drain electrode is formed in the drain recess. The gate electrode is formed on the capping layer between the source electrode and the drain electrode.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 24, 2020
    Inventors: Che-Kai LIN, Chieh-Chih HUANG, Wei-Chou WANG, Walter Tony WOHLMUTH
  • Publication number: 20200203517
    Abstract: A semiconductor structure for improving the thermal stability and Schottky behavior by engineering the stress in a III-nitride semiconductor, comprising a III-nitride semiconductor and a gate metal layer. The III-nitride semiconductor has a top surface on which a conductive area and a non-conductive area are defined. The gate metal layer is formed directly on the top surface of the III-nitride semiconductor and comprises a gate connection line and at least one gate contact extending from the gate connection line in a second direction perpendicular to the length of the gate connection line. The at least one gate contact forms a Schottky contact with the III-nitride semiconductor on the conductive area, and the gate connection line is in direct contact with the III-nitride semiconductor on the non-conductive area. The non-conductive area of the III-nitride semiconductor is at least partially covered by the gate connection line.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 25, 2020
    Inventors: Jhih-Han DU, Yi Wei LIEN, Che-Kai LIN, Wei-Chou WANG
  • Publication number: 20190148498
    Abstract: An improved passivation structure for GaN field effect transistor comprising at least one dielectric layer formed on a top surface of a GaN field effect transistor and a passivation layer formed on a top surface of the dielectric layer. The GaN field effect transistor has a gate electrode comprising a Schottky contact metal layer, at least one diffusion barrier metal layer and a high conductivity metal layer. The passivation layer is made of a low cure temperature Polybenzoxazole (PBO) which can be cured at a low-temperature. Thereby the intermixing of the Schottky contact metal layer and the the diffusion barrier metal layer are prevented.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 16, 2019
    Inventors: Eric LEE, Yu-Kuo YANG, Che-Kai LIN, Forrest CHO, Walter Tony WOHLMUTH
  • Patent number: 10084109
    Abstract: A semiconductor structure for improving the gate metal adhesion and the Schottky stability, comprising: a III-nitride semiconductor having a top surface on which a conductive area and a non-conductive area are defined; a source contact metal and a first drain contact metal forming ohmic contact with the III-nitride semiconductor on the conductive area, and the first drain contact metal provided at one side of the source contact metal; and a gate metal layer comprising a gate connection line and a first gate finger extending from the gate connection line, the first gate finger interposing between the source contact metal and the first drain contact metal and forming a Schottky contact with the III-nitride semiconductor on the conductive area, wherein the first gate finger has a first terminal anchor at an end thereof surrounding the source contact metal, and the first terminal anchor has an increased width.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: September 25, 2018
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Jhih-Han Du, Yi Wei Lien, Che-Kai Lin, Wei-Chou Wang
  • Patent number: 9713889
    Abstract: A method of fabricating a housing includes: providing a metal member including a base plate and a sidewall, the base plate having an inner surface connected to the sidewall; providing a filler having a connecting surface and a first top surface; fixing the filler onto the metal member to make the connecting surface connect to the inner surface and the first top surface to respectively form first and second included angles larger than 90 degrees and smaller than 180 degrees; providing a film attached with an ink layer, and then performing a process of In-Mold-Roller Injection Molding to form a plastic on the sidewall and the filler, the ink layer attached to the plastic; and removing a part of the filler and a part of the plastic at the sidewall to form a machined surface connected to the inner surface and the upper appearance surface.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: July 25, 2017
    Assignee: HTC Corporation
    Inventors: Hsi-Hsing Hsu, Che-Kai Lin, Shan-Chin Chang, Chih-Wei Chen, Hung-Chi Shui
  • Publication number: 20170113385
    Abstract: A method of fabricating a housing includes: providing a metal member including a base plate and a sidewall, the base plate having an inner surface connected to the sidewall; providing a filler having a connecting surface and a first top surface; fixing the filler onto the metal member to make the connecting surface connect to the inner surface and the first top surface to respectively form first and second included angles larger than 90 degrees and smaller than 180 degrees; providing a film attached with an ink layer, and then performing a process of In-Mold-Roller Injection Molding to form a plastic on the sidewall and the filler, the ink layer attached to the plastic; and removing a part of the filler and a part of the plastic at the sidewall to form a machined surface connected to the inner surface and the upper appearance surface.
    Type: Application
    Filed: January 5, 2017
    Publication date: April 27, 2017
    Inventors: Hsi-Hsing HSU, Che-Kai LIN, Shan-Chin CHANG, Chih-Wei CHEN, Hung-Chi SHUI
  • Patent number: 9582029
    Abstract: A method of fabricating a housing includes: providing a metal member including a base plate and a sidewall, the base plate having an inner surface connected to the sidewall; providing a filler having a connecting surface and a first top surface; fixing the filler onto the metal member to make the connecting surface connect to the inner surface and the first top surface to respectively form first and second included angles larger than 90 degrees and smaller than 180 degrees; providing a film attached with an ink layer, and then performing a process of In-Mold-Roller Injection Molding to form a plastic on the sidewall and the filler, the ink layer attached to the plastic; and removing a part of the filler and a part of the plastic at the sidewall to form a machined surface connected to the inner surface and the upper appearance surface.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: February 28, 2017
    Assignee: HTC Corporation
    Inventors: Hsi-Hsing Hsu, Che-Kai Lin, Shan-Chin Chang, Chih-Wei Chen, Hung-Chi Shui
  • Patent number: 9537122
    Abstract: A fixing sheet adapted for fixing a battery to a body of an electronic apparatus is provided. The fixing sheet includes a structure layer having a first portion, a second portion and a split line. The first portion is adapted to be adhered to the battery. The second portion is structurally connected to the first portion and adapted to be adhered to the body. The split line is located at a common border of the first portion and the second portion. The first portion is capable of being forced relative to the second portion once the battery is forced relative to the body, so as to separate the first portion and the second portion along the split line. An electronic apparatus having the fixing sheet is also provided.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: January 3, 2017
    Assignee: HTC Corporation
    Inventors: Che-Kai Lin, Chih-Hao Huang
  • Publication number: 20160007493
    Abstract: A method of fabricating a housing includes: providing a metal member including a base plate and a sidewall, the base plate having an inner surface connected to the sidewall; providing a filler having a connecting surface and a first top surface; fixing the filler onto the metal member to make the connecting surface connect to the inner surface and the first top surface to respectively form first and second included angles larger than 90 degrees and smaller than 180 degrees; providing a film attached with an ink layer, and then performing a process of In-Mold-Roller Injection Molding to form a plastic on the sidewall and the filler, the ink layer attached to the plastic; and removing a part of the filler and a part of the plastic at the sidewall to form a machined surface connected to the inner surface and the upper appearance surface.
    Type: Application
    Filed: July 3, 2014
    Publication date: January 7, 2016
    Inventors: Hsi-Hsing HSU, Che-Kai LIN, Shan-Chin CHANG, Chih-Wei CHEN, Hung-Chi SHUI
  • Patent number: 8824139
    Abstract: A handheld electronic device includes a first body, a second body, and a locating member. The second body is slidably connected to the first body, and has a slide surface and a locating opening. The locating opening is located at an end of the slide surface. The locating member has an elastic portion and a sliding portion, the elastic portion is disposed between the first body and the sliding portion, and the sliding portion is capable of leaning against the slide surface or being inserted in the locating opening under an elastic prestress of the elastic portion.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: September 2, 2014
    Assignee: HTC Corporation
    Inventors: Chih-Wei Chen, Hsi-Hsing Hsu, Che-Kai Lin
  • Publication number: 20140113505
    Abstract: A fixing sheet adapted for fixing a battery to a body of an electronic apparatus is provided. The fixing sheet includes a structure layer having a first portion, a second portion and a split line. The first portion is adapted to be adhered to the battery. The second portion is structurally connected to the first portion and adapted to be adhered to the body. The split line is located at a common border of the first portion and the second portion. The first portion is capable of being forced relative to the second portion once the battery is forced relative to the body, so as to separate the first portion and the second portion along the split line. An electronic apparatus having the fixing sheet is also provided.
    Type: Application
    Filed: October 24, 2012
    Publication date: April 24, 2014
    Applicant: HTC CORPORATION
    Inventors: Che-Kai Lin, Chih-Hao Huang
  • Publication number: 20130016457
    Abstract: A handheld electronic device includes a first body, a second body, and a locating member. The second body is slidably connected to the first body, and has a slide surface and a locating opening. The locating opening is located at an end of the slide surface. The locating member has an elastic portion and a sliding portion, the elastic portion is disposed between the first body and the sliding portion, and the sliding portion is capable of leaning against the slide surface or being inserted in the locating opening under an elastic prestress of the elastic portion.
    Type: Application
    Filed: July 13, 2011
    Publication date: January 17, 2013
    Applicant: HTC CORPORATION
    Inventors: Chih-Wei Chen, Hsi-Hsing Hsu, Che-Kai Lin
  • Patent number: 7745853
    Abstract: A multi-layer structure with a transparent gate includes a MHEMT device structure comprising a GaAs substrate, a Schottky layer and a cap layer formed on the Schottky layer; a transparent gate formed on the Schottky layer being an indium tin oxide, ITO; and a drain and a source formed on the cap layer. Moreover, the MHEMT device structure includes a graded buffer, a buffer layer, a first spacer layer, a channel layer, and a second spacer layer formed between the GaAs substrate and the Schottky layer in a stacked fashion. The multi-layer structure is a transparent gate HEMT employing indium tin oxide which can make HEMT more sensitive to the light wave.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: June 29, 2010
    Assignee: Chang Gung University
    Inventors: Hsien-Chin Chiu, Liann-Be Chang, Che-Kai Lin
  • Publication number: 20090315077
    Abstract: A multi-layer structure with a transparent gate includes a MHEMT device structure comprising a GaAs substrate, a Schottky layer and a cap layer formed on the Schottky layer; a transparent gate formed on the Schottky layer being an indium tin oxide, ITO; and a drain and a source formed on the cap layer. Moreover, the MHEMT device structure includes a graded buffer, a buffer layer, a first spacer layer, a channel layer, and a second spacer layer formed between the GaAs substrate and the Schottky layer in a stacked fashion. The multi-layer structure is a transparent gate HEMT employing indium tin oxide which can make HEMT more sensitive to the light wave.
    Type: Application
    Filed: June 18, 2008
    Publication date: December 24, 2009
    Inventors: Hsien-Chin Chiu, Liann-Be Chang, Che-Kai Lin