Patents by Inventor Che-Lieh Lin

Che-Lieh Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8436411
    Abstract: A non-volatile memory including a substrate, two first conductive layers, a second conductive layer, a first dielectric layer, a second dielectric layer and two heavily doped regions is provided. The substrate has at least two isolation structures therein and an active region between the isolation structures. The first conductive layers are respectively disposed on the isolation structures. The second conductive layer is disposed on the substrate and covering a portion of the active region and a portion of each first conductive layer. The first dielectric layer is disposed between each first conductive layer and the second conductive layer. The second dielectric layer is disposed between the second conductive layer in the active region and the substrate. The heavily doped regions are disposed in the substrate beside the second conductive layer in the active region.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: May 7, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Sung-Bin Lin, Yuan-Hsiang Chang, Yu-Huang Yeh, Che-Lieh Lin
  • Publication number: 20100171165
    Abstract: A non-volatile memory including a substrate, two first conductive layers, a second conductive layer, a first dielectric layer, a second dielectric layer and two heavily doped regions is provided. The substrate has at least two isolation structures therein and an active region between the isolation structures. The first conductive layers are respectively disposed on the isolation structures. The second conductive layer is disposed on the substrate and covering a portion of the active region and a portion of each first conductive layer. The first dielectric layer is disposed between each first conductive layer and the second conductive layer. The second dielectric layer is disposed between the second conductive layer in the active region and the substrate. The heavily doped regions are disposed in the substrate beside the second conductive layer in the active region.
    Type: Application
    Filed: January 6, 2009
    Publication date: July 8, 2010
    Applicant: United Microelectronics Corp.
    Inventors: Sung-Bin Lin, Yuan-Hsiang Chang, Yu-Huang Yeh, Che-Lieh Lin