Patents by Inventor Che-Min Huang

Che-Min Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11050415
    Abstract: In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes a first clock inverter circuit that resides within the flip-flop region, and a second clock inverter circuit residing within the flip-flop region. The first clock inverter circuit and the second clock inverter circuit are disposed on a first line. Master switch circuitry is made up of a first plurality of devices which are circumscribed by a master switch perimeter that resides within the flip-flop region of the integrated circuit layout. The master switch circuitry and the first clock inverter circuit are disposed on a second line perpendicular to the first line. Slave switch circuitry is operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: June 29, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Publication number: 20200099369
    Abstract: In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes a first clock inverter circuit that resides within the flip-flop region, and a second clock inverter circuit residing within the flip-flop region. The first clock inverter circuit and the second clock inverter circuit are disposed on a first line. Master switch circuitry is made up of a first plurality of devices which are circumscribed by a master switch perimeter that resides within the flip-flop region of the integrated circuit layout. The master switch circuitry and the first clock inverter circuit are disposed on a second line perpendicular to the first line. Slave switch circuitry is operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 26, 2020
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Patent number: 10530345
    Abstract: In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes a first clock inverter circuit that resides within the flip-flop region, and a second clock inverter circuit residing within the flip-flop region. The first clock inverter circuit and the second clock inverter circuit are disposed on a first line. Master switch circuitry is made up of a first plurality of devices which are circumscribed by a master switch perimeter that resides within the flip-flop region of the integrated circuit layout. The master switch circuitry and the first clock inverter circuit are disposed on a second line perpendicular to the first line. Slave switch circuitry is operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: January 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Publication number: 20190229715
    Abstract: In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes a first clock inverter circuit that resides within the flip-flop region, and a second clock inverter circuit residing within the flip-flop region. The first clock inverter circuit and the second clock inverter circuit are disposed on a first line. Master switch circuitry is made up of a first plurality of devices which are circumscribed by a master switch perimeter that resides within the flip-flop region of the integrated circuit layout. The master switch circuitry and the first clock inverter circuit are disposed on a second line perpendicular to the first line. Slave switch circuitry is operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Patent number: 10270432
    Abstract: In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes master switch circuitry made up of a first plurality of devices which are circumscribed by a master switch perimeter that resides within the flip-flop region. The flip-flop also includes slave switch circuitry operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter. The slave switch perimeter resides within the flip-flop region and is non-overlapping with the master switch perimeter.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Publication number: 20170317666
    Abstract: In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes master switch circuitry made up of a first plurality of devices which are circumscribed by a master switch perimeter that resides within the flip-flop region. The flip-flop also includes slave switch circuitry operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter. The slave switch perimeter resides within the flip-flop region and is non-overlapping with the master switch perimeter.
    Type: Application
    Filed: April 25, 2017
    Publication date: November 2, 2017
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Patent number: 9641161
    Abstract: In some embodiments, a flip-flop is laid-out on a flip-flop region of a semiconductor substrate. The flip-flop includes master switch circuitry made of a first plurality of devices which are circumscribed by a master switch perimeter residing within the flip-flop region. Scan mux input circuitry is operably coupled to an input of the master switch circuitry. The scan mux input circuitry is made up of a second plurality of devices that are circumscribed by a scan mux perimeter which resides within the flip-flop region and which is non-overlapping with the master switch perimeter. Slave switch circuitry is operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter which resides within the flip-flop region and which is non-overlapping with both the master switch perimeter and the scan mux perimeter.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: May 2, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Patent number: 7681350
    Abstract: An exemplary flat panel display (1) includes a main body (10) and a transparent holding structure (12) fixed to the main body. The holding structure is configured to hold one or more thin insertions by itself at a side thereof and or by cooperation with the main body wherein one or more thin insertions are held between the holding structure and the main body at a side of the holding structure.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: March 23, 2010
    Assignee: Innolux Display Corp.
    Inventors: Meng-Tse Tsai, Chen-Yu Wu, Hsiao-Yuan Ho, Chi-Wen Chiang, Che-Min Huang, Yung-Hsiang Chen
  • Patent number: 7639483
    Abstract: An exemplary flat panel display (1) includes a display body (2), a neck (4), and at least one foot (6). The display body includes a back cover (20). The back cover includes a protruding portion (201), and a recessed portion (203) adjacent to the protruding portion. The neck is connected with the display body by a pivot (41), and corresponds to the recessed portion. The at least one foot is connected with the neck by a pivot assembly (42). The at least one foot supports the neck and the display body, and corresponds to the protruding portion. When the flat panel display is folded up, the neck is at least partially accommodated in the recessed portion, and the at least one foot is positioned a peripheral edge of the protruding portion.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: December 29, 2009
    Assignee: Innolux Display Corp.
    Inventors: Yung-Hsiang Chen, Che-Min Huang, Meng-Tse Tsai, Hsiao-Yuan Ho, Chien-Tung Chu, Lan-Shih Chou, Te-Hsu Wang
  • Patent number: 7595978
    Abstract: An exemplary flat panel display (1) includes a main body (10), a neck (11), and a base (12). The main body includes a chassis (17). The neck is connected with the chassis by a first pivot structure such that the main body can be rotated back and forth about a substantially horizontal axis. The base is connected with the neck by a second pivot structure such that the neck can be rotated left and right about a substantially vertical axis.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: September 29, 2009
    Assignee: Innolux Display Corp.
    Inventors: Yung-Hsiang Chen, Che-Min Huang, Chun-Chien Chen
  • Patent number: 7564679
    Abstract: An exemplary flat panel display (1) includes a display body (10) and a stand (12) supporting the display body. The stand includes a base (13), and a slider (14) slidably engaged to the base. The slider is configured for moving the display body upwardly or downwardly relative to the base.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: July 21, 2009
    Assignee: Innolux Display Corp.
    Inventors: Yung-Hsiang Chen, Che-Min Huang, Yun-Ling Liang, Ming-Chih Huang, Chen-Yu Wu, Hsiao-Ching Hung
  • Publication number: 20080252604
    Abstract: An exemplary on-screen display (OSD) controlling system (20) for a display device is provided. The system includes OSD buttons (22) without any symbols and an OSD menu (25) configured for displaying and adjusting characteristics of the display device. The OSD menu includes a primary OSD menu (211) and OSD submenus (213). The primary OSD menu displays first function icons (2112, 2113, 2114, 2115) denoting the display characteristics. Each function icon corresponds to at least one OSD submenu. Each OSD submenu includes second function icons (2141, 2142, 2143, 2144, 2145) configured to denote functions or movements of the corresponding OSD buttons. Each function icon of each OSD submenu corresponds to one OSD button.
    Type: Application
    Filed: April 14, 2008
    Publication date: October 16, 2008
    Inventors: Che-Min Huang, Chien-Tung Chu, Chi-Wen Chiang, Hsiao-Ching Hung, Hsiao-Yuan Ho
  • Publication number: 20080123269
    Abstract: An exemplary flat panel display (1) includes a main body (10) and a transparent holding structure (12) fixed to the main body. The holding structure is configured to hold one or more thin insertions by itself at a side thereof and or by cooperation with the main body wherein one or more thin insertions are held between the holding structure and the main body at a side of the holding structure.
    Type: Application
    Filed: December 19, 2006
    Publication date: May 29, 2008
    Inventors: Meng-Tse Tsai, Chen-Yu Wu, Hsiao-Yuan Ho, Chi-Wen Chiang, Che-Min Huang, Yung-Hsiang Chen
  • Publication number: 20080007904
    Abstract: An exemplary flat panel display (1) includes a display body (2), a neck (4), and at least one foot (6). The display body includes a back cover (20). The back cover includes a protruding portion (201), and a recessed portion (203) adjacent to the protruding portion. The neck is connected with the display body by a pivot (41), and corresponds to the recessed portion. The at least one foot is connected with the neck by a pivot assembly (42). The at least one foot supports the neck and the display body, and corresponds to the protruding portion. When the flat panel display is folded up, the neck is at least partially accommodated in the recessed portion, and the at least one foot is positioned a peripheral edge of the protruding portion.
    Type: Application
    Filed: July 9, 2007
    Publication date: January 10, 2008
    Inventors: Yung-Hsiang Chen, Che-Min Huang, Meng-Tse Tsai, Hsiao-Yuan Ho, Chien-Tung Chu, Lan-Shih Chou, Te-Hsu Wang
  • Publication number: 20070284323
    Abstract: An exemplary flat panel display includes a display panel, a supporting member, and a base portion. The supporting member includes a main body portion and a bending portion extending substantially toward a front side of the display panel. The base portion adjoins the main body portion and the display panel has a jointing portion pivotally connected to the bending portion. The jointing portion of the display panel is located within a top half region of the display panel, such that the display panel and the supporting member define an accommodating space therebetween.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 13, 2007
    Inventors: Yung-Hsiang Chen, Che-Min Huang, Meng-Tse Tsai, Ming-Chih Huang, Hsiao-Ching Hung, Chien-Tung Chu
  • Patent number: D550221
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: September 4, 2007
    Assignee: Innolux Display Corp.
    Inventors: Yung-Hsiang Chen, Che-Min Huang, Hsiao-Yuan Ho, Yun-Ling Liang, Chen-Yu Wu
  • Patent number: D564463
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: March 18, 2008
    Assignee: Innolux Display Corp.
    Inventors: Yung-Hsiang Chen, Che-Min Huang, Chi-Wen Chiang, Ming-Chih Huang, Chun-Chien Chen, Yun-Lin Liang
  • Patent number: D578528
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: October 14, 2008
    Assignee: Innolux Display Corp.
    Inventors: Che-Min Huang, Chien-Tung Chu, Chi-Wen Chiang, Hsiao-Ching Hung, Hsiao-Yuan Ho
  • Patent number: D578529
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: October 14, 2008
    Assignee: Innolux Display Corp.
    Inventors: Che-Min Huang, Chien-Tung Chu, Chi-Wen Chiang, Hsiao-Ching Hung, Hsiao-Yuan Ho
  • Patent number: D578532
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: October 14, 2008
    Assignee: Innolux Display Corp.
    Inventors: Che-Min Huang, Chien-Tung Chu, Chi-Wen Chiang, Hsiao-Ching Hung, Hsiao-Yuan Ho