Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: An E-paper display panel including an E-paper display layer, a first substrate, a pixel array layer, a common electrode layer, and a driving circuit is provided. The first substrate is disposed at a first side of the E-paper display layer. The pixel array substrate is disposed between the first substrate and the E-paper display layer and includes touch electrodes and driving pixels arranged in an array. Each driving pixel includes a first pixel electrode and a second pixel electrode. The touch electrodes, the first pixel electrode, and the second pixel electrode are overlapped with each other. The common electrode layer is disposed at a second side of the E-paper display layer. The first side is opposite to the second side. The driving circuit is in signal communication with the common electrode layer and the pixel array layer. The touch electrodes are individually in signal communication with the driving circuit.

Abstract: Selectively providing LC overdrive by determining a relative noise level between a current video frame and a previous video frame and overdriving the current video frame based upon the determined relative noise level.

Abstract: The present invention provides a control apparatus of an antenna array. The control apparatus of an antenna array comprises a control circuit including a serial interface circuit connected to the first switch and the second switch by a first control line and a second control line separately, and an antenna coupled between the first switch and the second switch. The serial interface circuit controls On/Off status of the first switch and the second switch separately through the first control line and the second control line. Furthermore, the control circuit and the others can be connected serially through the included serial interface circuits to increase the number of antennas.

Abstract: A charge-pump circuit without reverse current is disclosed. The charge-pump circuit includes: several diode equivalent networks connecting in series, between any two of adjacent diode equivalent networks having a node with a corresponding voltage-boost level, wherein the low voltage end in the diode equivalent network with lowest voltage-boost level is the input of the charge-pump circuit, and the input receives an input voltage signal; a voltage-boost capacitor network having an end to electronically couple to one of the node and the other end to electronically couple to a pulse signal, wherein the pulse signal has a high-voltage level and a low-voltage level to raise a voltage level at the node with voltage-boost as high-voltage level and low-voltage level switches; and a reverse current cut-off circuit electronically coupled to the diode equivalent networks to enable and disable the diode equivalent networks, wherein the reverse current cut-off circuit has two conductive paths.

Abstract: A comparator with a fixed reference voltage (self bias) for an oscillator is disclosed. The comparator includes: a depletion MOS network to form a source current, wherein the gate and the source has a connection; and an enhanced MOS transistor, wherein the drain or the source connects with the depletion MOS transistor in series. The gate of the enhanced MOS transistor receives an input voltage when the input voltage is lower than the reference voltage, and the comparator outputs a high level voltage, or the enhanced MOS transistor outputs a low level voltage if the input voltage is higher then the reference voltage. Moreover, the oscillator's comparator has a reference voltage that is independent from temperature and supply voltage source.

Abstract: A charge-pump circuit without reverse current is disclosed. The charge-pump circuit includes: several diode equivalent networks connecting in series, between any two of adjacent diode equivalent networks having a node with a corresponding voltage-boost level, wherein the low voltage end in the diode equivalent network with lowest voltage-boost level is the input of the charge-pump circuit, and the input receives an input voltage signal; a voltage-boost capacitor network having an end to electronically couple to one of the node and the other end to electronically couple to a pulse signal, wherein the pulse signal has a high-voltage level and a low-voltage level to raise a voltage level at the node with voltage-boost as high-voltage level and low-voltage level switches; and a reverse current cut-off circuit electronically coupled to the diode equivalent networks to enable and disable the diode equivalent networks, wherein the reverse current cut-off circuit has two conductive paths.

Abstract: In a radio-frequency identification (RFID) system capable of detecting RFID tag orientation, a RFID tag thereof comprises a plurality of antennas. When a particular one of the antennas receives an RF signal from a reader of the RFID system, the RFID tag is able to send out an identification data corresponding to that antenna receiving the RF signal, enabling a processor of the RFID system to determine the position and orientation of the RFID tag based on the identification data read by the reader. A puzzle system can be designed by employing the RFID system capable of detecting RFID tag orientation.

Abstract: The invention discloses a sensing type learning card and a learning system including the card and a card reader. The sensing type learning card includes at least one card body and at least one identification label. The card reader includes a platform with a defined card disposing area, at least one sensing unit installed at the platform, at least one display unit installed on the card disposing area, a storage unit for storing at least one learning data, and a processing unit. The card body includes a transparent area. The identification label stores an identification data. If the sensing type learning card is disposed on the card disposing area, the sensing unit senses the identification label to read the identification data, and the processing unit inquires a learning data corresponding to the identification data from the storage unit, and drives the display unit to display the inquired learning data.

Abstract: This invention discloses a RF sensing system, a RF display device and a puzzle system using the same. The RF sensing system includes a platform, at least one RF reader and a RF display device. The RF reader is installed at the platform for generating a radio signal. The RF display device includes a display panel and a flat panel. If the RF display device receives the radio signal, the display panel can change a display state. The flat panel has a text or an image. If the display panel is at an opaque state, at least a portion of the text or the image is blocked by the display panel. If the display panel is at a transparent state, the text or the image is exposed. If the flat panel has a puzzle pattern, several RF display devices can be used for forming a puzzle.

Abstract: This invention discloses a RFID positioning apparatus and a method for identifying and positioning at least one RFID tag. The apparatus comprises a transmission module for transmitting a frequency, a capacitor, sensing modules, an identification module and circuit modules. A first switching unit of the sensing module performs a connection operation according to the frequency to form a magnetic flux of a induction coil and the capacitor, such that the first induction coil senses an identification signal of a RFID tag. The identification module receives the identification signal for identifying and positioning the RFID tag. Each circuit module is connected to the transmission module, sensing module, capacitor and identification module, and transmits the identification signal. The circuit modules have substantially equal length to achieve a matched status of all induction coils.

Abstract: A game system and a method of playing game are disclosed. The game system comprises puzzle blocks being provided with at least one identifier each, reader units for separately reading the identifiers of the puzzle blocks, a storage unit for storing at least one game mode which is corresponding to a permutation data of the puzzle blocks, a selection unit for selecting a desired game mode, and a processing unit for scanning the reader units and identifying current positions of the puzzle blocks based on the identifiers read by the reader units, and comparing the positions of puzzle blocks with the permutation data of puzzle blocks corresponding to the selected game mode, and generating a response message based on comparison result.

Abstract: The present invention disclose an array reading system for detecting at least one object that has at least one tag identifier provided thereon, which comprises an array reader, a digital control circuit, and a processor. The array reader includes a plurality of image sensors for reading the at least one tag identifier separately, and a multi-channel analog circuit. The digital control circuit is electrically connected to the multi-channel analog circuit of the array reader for scanning the at least one tag identifier on the object to thereby detect a manner in which the object is positioned. The processor identifies based on the positioning manner of the object and the tag identifier whether the object is put at a correct position. With these arrangements, it is possible to quickly read data of the tag identifier and locate the position of the object using the array reader.

Abstract: A comparator with a fixed reference voltage (self bias) for an oscillator is disclosed. The comparator includes: a depletion MOS network to form a source current, wherein the gate and the source has a connection; and an enhanced MOS transistor, wherein the drain or the source connects with the depletion MOS transistor in series. The gate of the enhanced MOS transistor receives an input voltage when the input voltage is lower than the reference voltage, and the comparator outputs a high level voltage, or the enhanced MOS transistor outputs a low level voltage if the input voltage is higher then the reference voltage. Moreover, the oscillator's comparator has a reference voltage that is independent from temperature and supply voltage source.

Abstract: The present invention provides a control apparatus of an antenna array. The control apparatus of an antenna array comprises a control circuit including a serial interface circuit connected to the first switch and the second switch by a first control line and a second control line separately, and an antenna coupled between the first switch and the second switch. The serial interface circuit controls On/Off status of the first switch and the second switch separately through the first control line and the second control line. Furthermore, the control circuit and the others can be connected serially through the included serial interface circuits to increase the number of antennas.

Abstract: An RFID reader having a multi-dimensional antenna array makes use of electronic circuits to change the antennas or coils of an RFID device to form a multi-dimensional antenna array, thereby accomplishing detection of the ID codes of RFID tag devices in a scanning way of the RFID technology. This scanning method can also actively discriminate the locations of RFID tag devices. The RFID reader having a multi-dimensional antenna array can scan a plurality of RFID tag devices, and can also effectively discriminate the locations of these RFID tag devices.

Abstract: The present invention discloses a radio frequency identification device implemented with a metal-gate semiconductor fabrication process, wherein the charge capacitor, which is formed by the special parasitic N-type and P-type guard rings in the chip fabricated with the metal-gate process, incorporated with the original P-type and N-type transistors of metal oxide semiconductor (PMOS/NMOS) not only can provide a horizontal surface current but also can provide a rectified current for the performance of the entire circuit, which can advance the metal gate process to RFID industry in cooperation with an identification code holder circuit and a non-synchronous local oscillation circuit so that the fabrication cost can be lowered and the fabrication time can be shortened.

Abstract: A RFID system applying to a three-dimensional jigsaw is provided. The RFID system includes a jigsaw substrate having a plurality of blocks, a plurality of jigsaw units corresponding to each blocks of the jigsaw substrate, a RFID reader having a plurality of antennas positioned in a position of each blocks of the jigsaw substrate, and a plurality of tags positioned in a position of each face of a three-dimensional jigsaw unit corresponding to the positions of the antennas, wherein the RFID reader communicates to the tags using modulated radio signals through the antennas and the tags respond with modulated radio signals in order to determine whether the orientation of the three-dimensional jigsaw unit is correct or not.

Abstract: An RFID reader having a multi-dimensional antenna array makes use of electronic circuits to change the antennas or coils of an RFID device to form a multi-dimensional antenna array, thereby accomplishing detection of the ID codes of RFID tag devices in a scanning way of the RFID technology. This scanning method can also actively discriminate the locations of RFID tag devices. The RFID reader having a multi-dimensional antenna array can scan a plurality of RFID tag devices, and can also effectively discriminate the locations of these RFID tag devices.

Abstract: A method, system and apparatus for detecting a sub-pixel pair susceptible of producing a flicker event in an image from a video signal source displayed on a liquid crystal display (LCD) unit is described. A two dimensional flicker pattern analysis is performed on a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first next sub-pixel included in a first video frameline and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received, in real time, from the video signal source that includes a second current sub-pixel and a second current sub-pixel.