Patents by Inventor Che-Neng Wen

Che-Neng Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110307741
    Abstract: A non-intrusive debugging framework for parallel software based on a super multi-core framework is composed of a plurality of core clusters. Each of the core clusters includes a plurality of core processors and a debug node. Each of the core processors includes a DCP. The DCPs and the debug node are interconnected via at least one channel to constitute a communication network inside each of the core clusters. The core clusters are interconnected via a ring network. In this way, the memory inside each of the debug nodes constitutes a non-uniform debug memory space for debugging without affecting execution of the parallel program, such that it is applicable to current diversified dynamic debugging methods under the super multi-core system.
    Type: Application
    Filed: October 14, 2010
    Publication date: December 15, 2011
    Applicant: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Tien-Fu Chen, Che-Neng Wen, Shu-Hsuan Chou, Yen-Lan Hsu
  • Publication number: 20100274550
    Abstract: With the present invention, buses and silicon IPs are simulated together. A virtual platform is provided for designing hardware and system. And correct and fast simulations of I/Os are provided through the I/Os on a FPGA. Thus, software performances are monitored and system bottlenecks are acquired.
    Type: Application
    Filed: January 24, 2008
    Publication date: October 28, 2010
    Applicant: National Chung Cheng University
    Inventors: Tsung-Yi Chou, Wei-Chun Ku, Che-Neng Wen, Tien-Fu Chen