Patents by Inventor Che-Ping Chen

Che-Ping Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230041949
    Abstract: A memory controller receives a command to program information to a memory storage array controlled by the memory controller. The memory controller determines a target memory state to store the information, and a target threshold voltage level corresponding to the target memory state. Based at least on the target memory state, the memory controller determines one or more program pulses for a pre-program cycle, including voltage levels for the one or more program pulses based at least on the target threshold voltage level. The memory controller selects a memory location in the memory storage array to program the information, and pre-programs the selected memory location by applying the one or more program pulses at respective voltage levels, the one or more program pulses applied without program verify operations. Following the pre-programming, the memory controller programs the information to the selected memory location.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Applicant: Macronix International Co., Ltd.
    Inventors: Che-Ping CHEN, Ya-Jui LEE
  • Patent number: 11056172
    Abstract: A flash memory and an operation method thereof are provided. The flash memory includes a plurality of memory cell strings and a pass voltage generator. Each of the memory cell strings includes a plurality of memory cells. The pass voltage generator is configured to provide a pass voltage to a plurality of word lines of a plurality of unselected memory cells of a selected memory string. During a reading operation, the pass voltage generator raises the pass voltage from a first voltage at a first time point, and raises the pass voltage to a second voltage at a second time point. The second voltage is lower than a target voltage times a preset ratio The first time point is earlier than a start time point of a bit line voltage received by the selected memory cell, and the second time point occurs at the start time point of the bit line voltage.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: July 6, 2021
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Che-Ping Chen, Ya-Jui Lee, Shin-Jang Shen, Yih-Shan Yang
  • Patent number: 9129710
    Abstract: A dynamic trim method includes testing a selected number of cells on a die with predetermined testing margins. Data from this testing is used to determine dynamic reference margins for improving yield. Advantageously, yield is improved by allowing functioning fast or slow units to pass wafer sort by applying the dynamic reference margins for varying processes.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: September 8, 2015
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Yi He, Larry Y. Wang, Sean Lynch, Che-Ping Chen, Wei Zhao, Albert Bergemont
  • Patent number: 8630137
    Abstract: A dynamic trim method includes testing a selected number of cells on a die with predetermined testing margins. Data from this testing is used to determine dynamic reference margins for improving yield. Advantageously, yield is improved by allowing functioning fast or slow units to pass wafer sort by applying the dynamic reference margins for varying processes.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: January 14, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Yi He, Larry Wang, Sean Lynch, Che-Ping Chen, Wei Zhao, Albert Bergemont