Abstract: Provided are a precharging method and a programming method for a 3D memory device that includes a top-deck word line group, a middle dummy word line group, a bottom-deck word line group, and a bottom dummy word line group. The precharging method includes: selecting a word line to be programmed; determining whether the word line is in the top- or bottom-deck word line group; applying a precharge on voltage to the middle dummy word line group to turn on a channel to precharge the channel when the word line is in the top-deck word line group; and applying a precharge off voltage to the middle dummy word line group to turn off the channel to not precharge the channel when the word line is in the bottom-deck word line group. This method is suitable for a 3D NAND flash memory having high capacity and high performance.

Abstract: Provided are a precharging method and a programming method for a 3D memory device that includes a top-deck word line group, a middle dummy word line group, a bottom-deck word line group, and a bottom dummy word line group. The precharging method includes: selecting a word line to be programmed; determining whether the word line is in the top- or bottom-deck word line group; applying a precharge on voltage to the middle dummy word line group to turn on a channel to precharge the channel when the word line is in the top-deck word line group; and applying a precharge off voltage to the middle dummy word line group to turn off the channel to not precharge the channel when the word line is in the bottom-deck word line group. This method is suitable for a 3D NAND flash memory having high capacity and high performance.

Abstract: An operation method of a memory device including the following operations is provided. Applying a read voltage to a selected page of a plurality of programmed memory pages. Applying a first pass voltage to unselected pages of the plurality of programmed memory pages. Applying a second pass voltage to at least one unprogrammed memory page, wherein the first pass voltage is larger than the second pass voltage. A memory system including a 3D NAND flash memory with high capacity and high performance is also provided.

Abstract: An operation method of a memory device including the following operations is provided. Applying a read voltage to a selected page of a plurality of programmed memory pages. Applying a first pass voltage to unselected pages of the plurality of programmed memory pages. Applying a second pass voltage to at least one unprogrammed memory page, wherein the first pass voltage is larger than the second pass voltage. A memory system including a 3D NAND flash memory with high capacity and high performance is also provided.

Abstract: A memory controller receives a command to program information to a memory storage array controlled by the memory controller. The memory controller determines a target memory state to store the information, and a target threshold voltage level corresponding to the target memory state. Based at least on the target memory state, the memory controller determines one or more program pulses for a pre-program cycle, including voltage levels for the one or more program pulses based at least on the target threshold voltage level. The memory controller selects a memory location in the memory storage array to program the information, and pre-programs the selected memory location by applying the one or more program pulses at respective voltage levels, the one or more program pulses applied without program verify operations. Following the pre-programming, the memory controller programs the information to the selected memory location.

Abstract: Provided are a memory device and a pre-charge method for a memory device. The pre-charge method includes: applying a plurality of independently-controlled pre-charge voltages to a plurality of turned-on word lines, wherein the plurality of pre-charge voltages are selected among a plurality of reference pre-charge voltages; and applying a plurality of turned-off voltages to a plurality of turned-off word lines. On a predetermined direction, a target turned-on word line among the plurality of turned-on word lines is adjacent to a next adjacent target turned-off word line among the plurality of turned-off word lines; and a voltage difference from the target turned-on word line toward the next adjacent target turned-off word line is smaller than a predetermined reference voltage difference.

Abstract: A memory controller receives a command to program information to a memory storage array controlled by the memory controller. The memory controller determines a target memory state to store the information, and a target threshold voltage level corresponding to the target memory state. Based at least on the target memory state, the memory controller determines one or more program pulses for a pre-program cycle, including voltage levels for the one or more program pulses based at least on the target threshold voltage level. The memory controller selects a memory location in the memory storage array to program the information, and pre-programs the selected memory location by applying the one or more program pulses at respective voltage levels, the one or more program pulses applied without program verify operations. Following the pre-programming, the memory controller programs the information to the selected memory location.

Abstract: A memory controller receives a command to program information to a memory storage array controlled by the memory controller. The memory controller determines a target memory state to store the information, and a target threshold voltage level corresponding to the target memory state. Based at least on the target memory state, the memory controller determines one or more program pulses for a pre-program cycle, including voltage levels for the one or more program pulses based at least on the target threshold voltage level. The memory controller selects a memory location in the memory storage array to program the information, and pre-programs the selected memory location by applying the one or more program pulses at respective voltage levels, the one or more program pulses applied without program verify operations. Following the pre-programming, the memory controller programs the information to the selected memory location.

Abstract: A flash memory and an operation method thereof are provided. The flash memory includes a plurality of memory cell strings and a pass voltage generator. Each of the memory cell strings includes a plurality of memory cells. The pass voltage generator is configured to provide a pass voltage to a plurality of word lines of a plurality of unselected memory cells of a selected memory string. During a reading operation, the pass voltage generator raises the pass voltage from a first voltage at a first time point, and raises the pass voltage to a second voltage at a second time point. The second voltage is lower than a target voltage times a preset ratio The first time point is earlier than a start time point of a bit line voltage received by the selected memory cell, and the second time point occurs at the start time point of the bit line voltage.

Abstract: A dynamic trim method includes testing a selected number of cells on a die with predetermined testing margins. Data from this testing is used to determine dynamic reference margins for improving yield. Advantageously, yield is improved by allowing functioning fast or slow units to pass wafer sort by applying the dynamic reference margins for varying processes.

Abstract: A dynamic trim method includes testing a selected number of cells on a die with predetermined testing margins. Data from this testing is used to determine dynamic reference margins for improving yield. Advantageously, yield is improved by allowing functioning fast or slow units to pass wafer sort by applying the dynamic reference margins for varying processes.