Patents by Inventor Che-Rong Liang

Che-Rong Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hybrid multi-layer mask
    Patent number: 8202681
    Abstract: A hybrid mask set for exposing a plurality of layers on a semiconductor substrate to create an integrated circuit device is disclosed. The hybrid mask set includes a first group of one or more multi-layer masks (MLMs) for a first subset of the plurality of layers. Each MLM includes a plurality of different images for different layers, the images being separated by a relatively wide image spacer. The hybrid mask set also includes a first group of one or more production-ready masks for a second subset of the plurality of layers. Each production-ready mask includes a plurality of similar images for a common layer, each image being separated by a relatively narrow scribe street.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: June 19, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Lung Lin, Kuan-Liang Wu, Che-Rong Liang, Fei-Gwo Tsai
  • Hybrid Multi-Layer Mask
    Publication number: 20110281208
    Abstract: A hybrid mask set for exposing a plurality of layers on a semiconductor substrate to create an integrated circuit device is disclosed. The hybrid mask set includes a first group of one or more multi-layer masks (MLMs) for a first subset of the plurality of layers. Each MLM includes a plurality of different images for different layers, the images being separated by a relatively wide image spacer. The hybrid mask set also includes a first group of one or more production-ready masks for a second subset of the plurality of layers. Each production-ready mask includes a plurality of similar images for a common layer, each image being separated by a relatively narrow scribe street.
    Type: Application
    Filed: July 21, 2011
    Publication date: November 17, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Feng-Lung Lin, Kuan-Liang Wu, Fei-Gwo Tsai, Che-Rong Liang
  • Multiple technology node mask
    Patent number: 8007966
    Abstract: A method of fabricating a mask set is provided. The method includes providing mask data associated with a plurality of mask layers. The mask data includes a first pattern associated with a first technology node and a second pattern associated with a second technology node. The method continues with determining to form a multi-technology node mask (MTM) for a first mask layer of the plurality of mask layers. The MTM for the first mask layer is formed, which includes features associated with the first pattern and features associated with the second pattern.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: August 30, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng Lung Lin, Kuan Liang Wu, Fei-Gwo Tsai, Che-Rong Liang
  • Hybrid multi-layer mask
    Patent number: 8003281
    Abstract: A hybrid mask set for exposing a plurality of layers on a semiconductor substrate to create an integrated circuit device is disclosed. The hybrid mask set includes a first group of one or more multi-layer masks (MLMs) for a first subset of the plurality of layers. Each MLM includes a plurality of different images for different layers, the images being separated by a relatively wide image spacer. The hybrid mask set also includes a first group of one or more production-ready masks for a second subset of the plurality of layers. Each production-ready mask includes a plurality of similar images for a common layer, each image being separated by a relatively narrow scribe street.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: August 23, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventors: Feng-Lung Lin, Kuan-Liang Wu, Che-Rong Liang, Fei-Gwo Tsai
  • MULTIPLE TECHNOLOGY NODE MASK
    Publication number: 20110113389
    Abstract: A method of fabricating a mask set is provided. The method includes providing mask data associated with a plurality of mask layers. The mask data includes a first pattern associated with a first technology node and a second pattern associated with a second technology node. The method continues with determining to form a multi-technology node mask (MTM) for a first mask layer of the plurality of mask layers. The MTM for the first mask layer is formed, which includes features associated with the first pattern and features associated with the second pattern.
    Type: Application
    Filed: January 14, 2011
    Publication date: May 12, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Feng Lung Lin, Kuan Liang Wu, Fei-Gwo Tsai, Che-Rong Liang
  • Multiple technology node mask
    Patent number: 7875406
    Abstract: A multiple technology node mask (MTM) is provided. An MTM includes a pattern associated with a first technology node and a pattern associated with a second technology node. The first technology node and the second technology node may be different. For example, the first technology node may be a main node and the second technology node a sub-node. A mask set including an MTM may also include single technology node masks (STMs) for mask layers in which the first technology node and second technology node and/or the patterns associated with each are not compatible. A single mask set including MTM and STMs, may be used to produce a plurality of devices, each on a different wafer.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: January 25, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng Lung Lin, Kuan Liang Wu, Fei-Gwo Tsai, Che-Rong Liang
  • HYBRID MULTI-LAYER MASK
    Publication number: 20100047698
    Abstract: A hybrid mask set for exposing a plurality of layers on a semiconductor substrate to create an integrated circuit device is disclosed. The hybrid mask set includes a first group of one or more multi-layer masks (MLMs) for a first subset of the plurality of layers. Each MLM includes a plurality of different images for different layers, the images being separated by a relatively wide image spacer. The hybrid mask set also includes a first group of one or more production-ready masks for a second subset of the plurality of layers. Each production-ready mask includes a plurality of similar images for a common layer, each image being separated by a relatively narrow scribe street.
    Type: Application
    Filed: October 13, 2008
    Publication date: February 25, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Feng-Lung Lin, Kuan-Liang Wu, Che-Rong Liang, Fei-Gwo Tsai
  • MULTIPLE TECHNOLOGY NODE MASK
    Publication number: 20090246975
    Abstract: A multiple technology node mask (MTM) is provided. An MTM includes a pattern associated with a first technology node and a pattern associated with a second technology node. The first technology node and the second technology node may be different. For example, the first technology node may be a main node and the second technology node a sub-node. A mask set including an MTM may also include single technology node masks (STMs) for mask layers in which the first technology node and second technology node and/or the patterns associated with each are not compatible. A single mask set including MTM and STMs, may be used to produce a plurality of devices, each on a different wafer.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Feng Lung Lin, Kuan Liang Wu, Fei-Gwo Tsai, Che-Rong Liang