Patents by Inventor Che-Shih Lin

Che-Shih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11488771
    Abstract: An adapter is provided and having a circuit board, primary components and secondary components installed on the circuit board, a shielding plate disposed between the primary components and the secondary components, and a transformer installed on the circuit board. The transformer has a bobbin, an iron core set assembled with the bobbin, at least one movable pin, at least one first winding, and at least one second winding. The movable pin is able to be positioned at an upper position for allowing the iron core set to be assembled with the bobbin or for allowing the first winding and the second winding to be wound onto the winding portion, and the movable pin is able to be positioned at a lower position when the transformer is installed onto the circuit board. Thereby, the adapter can be assembled in an automated process with improved assembly efficiency and high production yields.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: November 1, 2022
    Assignee: CHICONY POWER TECHNOLOGY CO., LTD.
    Inventors: Po-Chien Chou, Che-Shih Lin
  • Publication number: 20220199306
    Abstract: A transformer includes a bobbin. The bobbin includes a main body, a connection member, and a terminal base. The main body is wound by a coil. Two sides of the connection member are respectively connected to the main body and the terminal base. A plurality of connection terminals of the coil extend to the terminal base through a wire trough of the main body and are connected to pins of the terminal base. The connection member is cut off by automated machining, and the terminal base is mounted on a surface of a housing of the transformer, and no pin is disposed on the housing. Hence, the overall size of the transformer is effectively reduced.
    Type: Application
    Filed: March 29, 2021
    Publication date: June 23, 2022
    Inventors: Po-Chien Chou, Che-Shih Lin, Yi-Wei Su
  • Publication number: 20200161043
    Abstract: An adapter is provided and having a circuit board, primary components and secondary components installed on the circuit board, a shielding plate disposed between the primary components and the secondary components, and a transformer installed on the circuit board. The transformer has a bobbin, an iron core set assembled with the bobbin, at least one movable pin, at least one first winding, and at least one second winding. The movable pin is able to be positioned at an upper position for allowing the iron core set to be assembled with the bobbin or for allowing the first winding and the second winding to be wound onto the winding portion, and the movable pin is able to be positioned at a lower position when the transformer is installed onto the circuit board. Thereby, the adapter can be assembled in an automated process with improved assembly efficiency and high production yields.
    Type: Application
    Filed: January 22, 2020
    Publication date: May 21, 2020
    Inventors: Po-Chien CHOU, Che-Shih LIN
  • Publication number: 20190035526
    Abstract: A transformer includes a bobbin, a connection pin, a movable pin, a first and a second winding. The bobbin has two side walls between which a winding portion is arranged. A protruding plate extends from one of the side walls, a through hole is defined on the protruding plate, and the connection pin is arranged on the other side wall. The movable pin with a first and second latch portion is inserted in the through hole, the second latch portion is positioned in the through hole, and the first latch portion is arranged away from the protruding plate. The first winding is arranged on the winding portion and connected with the connection pin. The second winding is arranged on the winding portion and connected with the movable pin. Thereby, the transformer could be assembled in an automatic process, with low labor costs, improved assembly efficiency and high production yields.
    Type: Application
    Filed: October 4, 2017
    Publication date: January 31, 2019
    Inventors: Po-Chien CHOU, Che-Shih LIN
  • Patent number: 9466375
    Abstract: A memory device and a programming method thereof are provided, and the programming method for the memory device includes following steps. During a first period, a first voltage from a common source line is transmitted to first ends of a first memory cell string and a second memory cell string, and second ends of the first and the second memory cell strings are floated. During a second period, the first ends of the first and the second memory cell strings are floated, a second voltage and a third voltage are respectively transmitted to the second ends of the first and the second memory cell strings, and a programming voltage and a plurality of passing voltages are applied, so as to inhibit programming of the first memory cell string and sequentially program a plurality of memory cells in the second memory cell string from a second side of a memory array.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: October 11, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Che-Shih Lin, Yao-Wen Chang
  • Patent number: 8345396
    Abstract: An RC delay circuit for providing electrostatic discharge (ESD) protection is described. The circuit employs an NMOS transistor and a PMOS transistor to produce a large effective resistance using a relatively small circuit layout area.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: January 1, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Shih-Yu Wang, Chia-Ling Lu, Yu-Lien Liu, Yan-Yu Chen, Che-Shih Lin, Tao-Cheng Lu
  • Publication number: 20110216454
    Abstract: An RC delay circuit for providing electrostatic discharge (ESD) protection is described. The circuit employs an NMOS transistor and a PMOS transistor to produce a large effective resistance using a relatively small circuit layout area.
    Type: Application
    Filed: March 8, 2010
    Publication date: September 8, 2011
    Inventors: Shih-Yu Wang, Chia-Ling Lu, Yu-Lien Liu, Yan-Yu Chen, Che-Shih Lin, Tao-Cheng Lu
  • Publication number: 20110189836
    Abstract: A method for reducing leakage current of a semiconductor device includes supplying a substantially constant and non-zero bulk bias to a relatively low threshold voltage semiconductor device during formation of a conductive channel of the semiconductor device and during the formation of a non-conductive channel of the semiconductor device.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 4, 2011
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yuan-Peng Chao, Yao Wen Chang, Hsing Wen Chang, Che-Shih Lin