Patents by Inventor Che-Wei Chang

Che-Wei Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260192780
    Abstract: A wiper includes a fixing base and an adapter. The fixing base includes a seat with a receiving space, a front slot, a rear slot, a positioning part, a first rear wall and a second rear wall. The adopter includes a main body, a front plate, a rear plate, a latch part, a first rear guiding groove and a second rear guiding groove. The adapter is assembled to the fixing base by inserting the front plate into the front slot and the rear plate into the rear slot, the latch part engages with the positioning part, the first guiding groove accommodates the first rear wall, and the second rear guiding groove accommodates the second rear wall.
    Type: Application
    Filed: January 3, 2025
    Publication date: July 9, 2026
    Inventors: Che-Wei CHANG, Cheng-Kai YANG, Chuan-Chih CHANG
  • Publication number: 20260184288
    Abstract: A windshield wiper includes a pivot frame, a mount, an adapter base, an adapter cover and a scraper. The pivot frame includes a pivot base and a pair of extension arms connected to two sides of the pivot base respectively, and the pivot base has a plurality of buckle slots. The mount has an accommodation space and a plurality of buckle hooks, and the mount is combined with the pivot base by interlocking the buckle hook with the buckle slot. The adapter base is attached into the accommodation space and includes a base and a first pivot part located on the base for pivoting a second pivot part of a drive arm. The adapter cover is pivoted to a first pivot part and engaged with the base to prevent the drive arm from detaching from the base. The scraper is combined with the bottom side of the mount.
    Type: Application
    Filed: December 1, 2025
    Publication date: July 2, 2026
    Inventors: Che-Wei CHANG, Cheng-Kai YANG, Chuan-Chih CHANG
  • Publication number: 20260159040
    Abstract: A windshield wiper mount assembly structure includes a mount (10), a wiper blade assembly (20), and a locking block (30). The mount (10) has a through-space (100) and an embedding slot (101) and multiple first positioning structures (11) around the embedding slot (101). The wiper blade assembly (20) includes a metal bracket (21) and a rubber strip (22); the metal bracket (21) has a notch (211) and is positioned within the through-space (100); the locking block (30) has a spacer column (31), a pair of slots, and multiple second positioning structures (33) and is secured in the embedding slot (101) by the mutual engagement of its second positioning structures (33) with the first positioning structures (11); the spacer column (31) engages with the notch (211); two sides of the metal bracket (21) are respectively inserted into the slots, so as to simplify the assembly structure of the wiper.
    Type: Application
    Filed: October 23, 2025
    Publication date: June 11, 2026
    Inventors: Che-Wei CHANG, Cheng-Kai YANG, Chuan-Chih CHANG
  • Publication number: 20260159042
    Abstract: A universal windshield wiper mount assembly (1) includes a mount (10), an adapter (20) and a scraper (30). The mount (10) has a combining space (100) and a first pivoting part (11). The adapter (20) has a second pivoting part (21) and is sheathed on the mount (10) to align the second pivoting part (21) with the first pivoting part (11) to combine the drive arm (2). The scraper (30) is combined with the bottom side of the mount (10). The components constitute the universal windshield wiper mount assembly (1).
    Type: Application
    Filed: October 31, 2025
    Publication date: June 11, 2026
    Inventors: Che-Wei CHANG, Cheng-Kai YANG, Chuan-Chih CHANG
  • Publication number: 20260159041
    Abstract: This disclosure is a wiper mounting base assembly. A pivot frame includes a pivot seat and extension arms. The pivot seat has a pivot shaft and latch grooves. A mounting seat has latch hooks. The mounting seat is coupled to the pivot seat through the latch hooks engaged with the latch grooves. An adapter seat includes a base and a carrier. A first coupling portion is disposed on the carrier. The base is coupled to the pivot seat through the pivot shaft pivotally received in the base. A driving arm fitting includes a second coupling portion and positioning portions. The driving arm fitting is coupled to the carrier through the second coupling portion engaged with the first coupling portion.
    Type: Application
    Filed: October 22, 2025
    Publication date: June 11, 2026
    Inventors: Che-Wei CHANG, Cheng-Kai YANG, Chuan-Chih CHANG
  • Publication number: 20260146347
    Abstract: A catalytic electrode includes a nickel-based porous base material, and a plurality of catalytic alloy balls of nickel and another metal doped with elements, in which the another metal includes iron, the elements include C, F, and S, and the catalytic alloy balls are dispersed on the surface of the nickel-based porous base material. The catalytic electrode also includes a plurality of metal phosphide particles covering the nickel-based porous base material and the catalytic alloy balls, and the metal phosphide particle includes nickel phosphide, nickel iron phosphide, nickel cobalt phosphide, nickel copper phosphide, or nickel zinc phosphide.
    Type: Application
    Filed: March 24, 2025
    Publication date: May 28, 2026
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Ying TSAI, Li-Yun YEH, Che-Wei CHANG, Yung-Liang TUNG, Wen-Sheng CHANG
  • Patent number: 12641786
    Abstract: A memory device and a method for controlling a verification voltage of a memory device are provided. The method includes: determining a bit count of data bits verified in one verification cycle to be K according to electrical characteristics of a memory sector of the memory device, wherein K is a positive integer; controlling a charge pump circuit of the memory device to start detecting the verification voltage and start pulling up the verification voltage at a beginning time point of a present verification cycle of the memory sector; controlling the charge pump circuit to stop pulling up the verification voltage at a verification time point of the present verification cycle in response to the verification voltage reaching a predetermined level; and after the verification time point of the present verification cycle, using the verification voltage to verify K data bits written into the first memory sector.
    Type: Grant
    Filed: September 11, 2024
    Date of Patent: May 26, 2026
    Assignee: eMemory Technology Inc.
    Inventors: Wei-Ming Ku, Wei-Chiang Ong, Chih-Yang Huang, Che-Wei Chang
  • Publication number: 20260133599
    Abstract: A reference current generator includes two transistors, a resistor and a mirroring circuit. The first transistor includes a source receiving a supply voltage, a drain connected with a first node, and a gate connected with a second node. The second transistor includes a source receiving the supply voltage, and a drain and a gate connected with a third node. The resistor is connected between the second node and the third node. The mirroring circuit includes an input terminal receiving an input current, a first mirrored terminal connected with the second node and a second mirrored terminal connected with the first node. The first mirrored terminal and the second mirrored terminal generate a first mirroring current and a second mirroring current respectively. The first transistor generates a saturation current. A reference current is equal to the saturation current minus the second mirroring current.
    Type: Application
    Filed: November 7, 2025
    Publication date: May 14, 2026
    Inventors: Che-Wei CHANG, Wei-Ming Ku
  • Patent number: 12628568
    Abstract: A method for fabricating a semiconductor device includes the steps of providing a substrate comprising a magnetic random access memory (MRAM) region and a logic region, forming a first magnetic tunneling junction (MTJ) on the MRAM region, forming a first inter-metal dielectric (IMD) layer around the first MTJ, and then forming a first metal interconnection extending from the MRAM region to the logic region on the first MTJ. Preferably, the first metal interconnection on the MRAM region and the first metal interconnection on the logic region have different heights.
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: May 12, 2026
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Che-Wei Chang, Chen-Yi Weng
  • Publication number: 20260129867
    Abstract: A method for fabricating a magnetoresistive random access memory (MRAM) device includes first providing a substrate having a MRAM region and a logic region, forming a first inter-metal dielectric (IMD) layer on the substrate, using a first patterned mask to remove the first IMD layer for forming a first via opening on the MRAM region and a second via opening on the logic region, forming a metal nitride layer in the first via opening and the second via opening, removing part of the metal nitride layer and part of the first IMD layer on the logic region for forming a trench opening, and forming a metal layer in the first via opening, the second via opening, and the trench opening for forming a first metal interconnection on the MRAM region and a second metal interconnection on the logic region.
    Type: Application
    Filed: December 2, 2024
    Publication date: May 7, 2026
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Chen-YI Weng, Che-Wei Chang
  • Publication number: 20260113934
    Abstract: A semiconductor device includes a substrate including an active area and a well region, a bitcell including a first gate structure and a second gate structure extending in a first direction across the active area and spaced apart in a second direction; a first conductive structure at a first side of the first gate structure; a second conductive structure between a second side of the first gate structure and a first side of the second gate structure; and a third conductive structure at a second side of the second gate structure; a fourth conductive structure vertically overlapping the well region; a first conductor connected to the first conductive structure and the third conductive structure; a second conductor connected to the fourth conductive structure; and a third conductor connected to the first and second gate structures. The second and fourth conductive structures are electrically connected to the well region.
    Type: Application
    Filed: October 22, 2024
    Publication date: April 23, 2026
    Inventors: Ya-Hui WU, Ling-Fang HSU, Tzu-Yu CHEN, Che-Wei CHANG, Chia-En HUANG, Ting-Wei CHIANG
  • Patent number: 12586732
    Abstract: A capacitor assembly package structure includes a first bottom electrode structure, a second bottom electrode structure, a capacitor assembly and an insulating package body. The second bottom electrode structure is separate from the first bottom electrode structure. The capacitor assembly is disposed on the first bottom electrode structure and the second bottom electrode structure. The capacitor assembly includes a plurality of capacitor elements electrically connected to each other, and each capacitor element has a positive electrode portion electrically connected to the first bottom electrode structure and a negative electrode portion electrically connected to the second bottom electrode structure. The insulating package body is configured to cover the capacitor elements of the capacitor assembly.
    Type: Grant
    Filed: May 9, 2024
    Date of Patent: March 24, 2026
    Assignee: APAQ TECHNOLOGY CO., LTD.
    Inventors: Shang-Che Lan, Che-Wei Chang, Shuo-Yen Ma, Yuh-Shyuan Lai
  • Publication number: 20260076099
    Abstract: A method for fabricating a magnetoresistive random access memory (MRAM) device includes the steps of first forming an inter-metal dielectric (IMD) layer on a substrate, forming a first metal interconnection and a second metal interconnection in the IMD layer, forming a spin orbit torque (SOT) layer on the first metal interconnection and the second metal interconnection, forming a magnetic tunneling junction (MTJ) on the SOT layer, forming a top electrode (TE) on the MTJ, and forming a cap layer on the MTJ and the SOT layer. Preferably, a bottom surface of the MTJ includes a first curve.
    Type: Application
    Filed: October 16, 2024
    Publication date: March 12, 2026
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Hsiang-Chi Chien, Che-Wei Chang, Chen-Yi Weng
  • Publication number: 20260047100
    Abstract: A method for fabricating a magnetoresistive random access memory (MRAM) device includes the steps of first forming a spin orbit torque (SOT) layer on a substrate, forming a magnetic tunneling junction (MTJ) on the SOT layer, forming a first cap layer on the MTJ, and then performing a first oxidation process to form a first spacer adjacent to the MTJ. Preferably, a bottom surface of the first cap layer is lower than a bottom surface of the first spacer.
    Type: Application
    Filed: September 12, 2024
    Publication date: February 12, 2026
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Che-Wei Chang, Chen-Yi Weng, Ching-Hua Hsu
  • Publication number: 20260042425
    Abstract: An assembly structure of a windshield wiper driving arm, the assembly structure includes an accessory piece and a wiper driving arm. The accessory piece includes a head portion, a main body and a pair of elastic arms. The main body is connected to the head portion. The pair of elastic arms are arranged on two sides of the head portion and two sides of the main body. Each elastic arm includes a pressing section and a positioning section. The positioning section includes a bump. The wiper driving arm includes an arm body and a cover. The cover includes a pair of restricting slots, and the wiper driving arm is coupled to the accessory piece through an engagement of each restricting slot and the bump.
    Type: Application
    Filed: August 9, 2024
    Publication date: February 12, 2026
    Inventors: Che-Wei CHANG, Cheng-Kai YANG, Chuan-Chih CHANG
  • Publication number: 20260039941
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a fixed portion, a movable portion, and a connecting element. The movable portion is movable relative to the fixed portion. The connecting element connects the fixed portion and the movable portion. A surface of the fixed portion connected to the connecting element faces a first direction, and a surface of the movable portion connected to the connecting element faces a second direction different from the first direction.
    Type: Application
    Filed: October 15, 2025
    Publication date: February 5, 2026
    Inventors: Chia-Che WU, Che-Wei CHANG, Yu-Chiao LO
  • Publication number: 20260033246
    Abstract: A magnetic random access memory structure includes a first dielectric layer; a bottom electrode layer disposed on the first dielectric layer; a spin orbit coupling layer disposed on the bottom electrode layer; a magnetic tunneling junction (MTJ) element disposed on the spin orbit coupling layer; a top electrode layer disposed on the MTJ element; a protective layer surrounding the MTJ element and the top electrode layer, and the protective layer masking the spin orbit coupling layer; a mask layer surrounding the protective layer; and a spacer layer surrounding the mask layer and the protective layer.
    Type: Application
    Filed: October 2, 2025
    Publication date: January 29, 2026
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Che-Wei Chang, Ching-Hua Hsu, Chen-Yi Weng, Po-Kai Hsu
  • Patent number: 12535842
    Abstract: A regulator includes a pre-regulator circuit, a pump circuit, an output stage circuit, and a tracking circuit. The pre-regulator circuit is configured to generate a pre-regulated voltage according to a power voltage. The pump circuit is configured to generate a pumped voltage according to the pre-regulated voltage and a tracking voltage. The output stage circuit is configured to generate an output voltage according to the pumped voltage and the power voltage. The tracking circuit is configured to track the output stage circuit to generate the tracking voltage and transmit the tracking voltage to the pump circuit.
    Type: Grant
    Filed: July 30, 2023
    Date of Patent: January 27, 2026
    Assignee: eMemory Technology Inc.
    Inventor: Che-Wei Chang
  • Publication number: 20260013142
    Abstract: A method for fabricating a magnetoresistive random access memory (MRAM) device includes the steps of first forming a spin orbit torque (SOT) layer on a substrate, forming a magnetic tunneling junction (MTJ) on the SOT layer, and then forming a first cap layer on the MTJ and the SOT layer. Preferably, a first angle included by a top surface of the SOT layer and a top surface of the first cap layer includes an acute angle.
    Type: Application
    Filed: August 1, 2024
    Publication date: January 8, 2026
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Shun-Yu Huang, Ya-Wei Shih, Che-Wei Chang, Chen-Yi Weng, Kun-Chen Ho
  • Patent number: 12512165
    Abstract: A sensing apparatus for a non-volatile memory includes two current mirrors, three switches, a voltage control circuit and a judging circuit. The input terminal of the first current mirror receives a reference current. A mirroring terminal of the first current mirror is connected with a data line. The first switch is connected between the data line and the voltage control circuit. The second switch is connected between the data line and a ground voltage. The third switch is connected between the voltage control circuit and a supply voltage. The input terminal of the second current mirror receives a bias current. The mirroring terminal of the second current mirror is connected with the judging node. The voltage control circuit and the judging circuit are connected with the judging node.
    Type: Grant
    Filed: May 7, 2024
    Date of Patent: December 30, 2025
    Assignee: EMEMORY TECHNOLOGY INC.
    Inventor: Che-Wei Chang