Patents by Inventor Che-Wei Wu

Che-Wei Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142748
    Abstract: An optical system is provided. The optical system is used for disposing on an electronic device. The optical system includes a movable portion, a fixed portion, a first driving assembly, and a support module. The movable portion is used for connecting to an optical module. The fixed portion is affixed on the electronic device, and the movable portion is movable relative to the fixed portion. The first driving assembly is used for driving the movable portion to move relative to the fixed portion. The movable portion is movably connected to the fixed portion through the support module.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: Ying-Jen WANG, Ya-Hsiu WU, Chen-Chi KUO, Chao-Chang HU, Yi-Ho CHEN, Che-Wei CHANG, Ko-Lun CHAO, Sin-Jhong SONG
  • Publication number: 20240120313
    Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
  • Publication number: 20240120018
    Abstract: A memory device, a failure bits detector, and a failure bits detection method thereof are provided. The failure bits detector includes a current generator, a current mirror, and a comparator. The current generator generates a first current according to a reference code. The current mirror mirrors the first current to generate a second current at a second end of the current mirror. The comparator compares a first voltage at a first input end with a second voltage at a second input end to generate a detection result.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Chung-Han Wu, Che-Wei Liang, Chih-He Chiang, Shang-Chi Yang
  • Publication number: 20240118316
    Abstract: A probe card and a manufacturing method of a probe card are provided. The probe card includes a probe head, first and second substrates, an insulating component, and an adhesive member. The second substrate is disposed between the probe head and the first substrate, and is disposed on the first substrate. The second substrate faces the first substrate and includes second contacts. The second contacts are electrically connected to first contacts of the first substrate. The insulating component is disposed between the first substrate and the second substrate, and disposed at an outer side of the second contacts. The adhesive member is disposed on the first substrate, arranged on at least a part of the side surface of the second substrate, and disposed at an outer side of the insulating component.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Applicant: MPI Corporation
    Inventors: Chin-Yi Lin, Che-Wei Lin, Ting-Ju Wu, Chien-Kai Hung
  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Patent number: 11922864
    Abstract: A display device includes a controller, a power management circuit and N display modules. Each of the N display modules includes M driving circuits, and M display arrays respectively connected to the M driving circuits. Each of the M driving circuits is configured to drive a display array connected to the driving circuit, and each of the display arrays includes at least one indicator light. The power management circuit is configured to output a voltage determined by the voltage control signal to the display arrays to supply power to the display array. M driving circuits in each of the display modules are cascaded through serial control lines. The controller is configured to address M driving circuits and read data of M driving circuits through the serial control lines, and send information to the driving circuits through the sharing data line to control the driving circuits and the indicator light.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: March 5, 2024
    Assignee: XIAMEN XM-PLUS TECHNOLOGY CO., LTD
    Inventor: Che-Wei Wu
  • Publication number: 20230395361
    Abstract: A thin-film deposition system includes a top plate positioned above a wafer and configured to generate a plasma during a thin-film deposition process. The system includes a sensor configured to generate sensor signals indicative of a lifetime of a component of the thin-film deposition system, a characteristic of a thin-film deposited by the thin-film deposition system or a characteristic of a process material that flows into the thin-film deposition system. The system includes a control system configured to adjust a relative location of a top plate of the thin-film deposition system with respect to a location of a wafer in the thin-film deposition system during the thin-film deposition process responsive to the sensor signals.
    Type: Application
    Filed: August 7, 2023
    Publication date: December 7, 2023
    Inventors: Yu-Hsiang CHENG, Che-Wei WU
  • Publication number: 20230343274
    Abstract: A display device includes a controller, a power management circuit and N display modules. Each of the N display modules includes M driving circuits, and M display arrays respectively connected to the M driving circuits. Each of the M driving circuits is configured to drive a display array connected to the driving circuit, and each of the display arrays includes at least one indicator light. The power management circuit is configured to output a voltage determined by the voltage control signal to the display arrays to supply power to the display array. M driving circuits in each of the display modules are cascaded through serial control lines. The controller is configured to address M driving circuits and read data of M driving circuits through the serial control lines, and send information to the driving circuits through the sharing data line to control the driving circuits and the indicator light.
    Type: Application
    Filed: March 6, 2023
    Publication date: October 26, 2023
    Applicant: XIAMEN XM-PLUS TECHNOLOGY CO., LTD
    Inventor: Che-Wei WU
  • Publication number: 20230105279
    Abstract: A thin-film deposition system includes a top plate positioned above a wafer and configured to generate a plasma during a thin-film deposition process. The system includes a sensor configured to generate sensor signals indicative of a lifetime of a component of the thin-film deposition system, a characteristic of a thin-film deposited by the thin-film deposition system or a characteristic of a process material that flows into the thin-film deposition system. The system includes a control system configured to adjust a relative location of a top plate of the thin-film deposition system with respect to a location of a wafer in the thin-film deposition system during the thin-film deposition process responsive to the sensor signals.
    Type: Application
    Filed: October 5, 2021
    Publication date: April 6, 2023
    Inventors: Yu-Hsiang CHENG, Che-Wei WU
  • Patent number: 11156669
    Abstract: Herein disclosed is a device for testing batteries as subjects and a method thereof. The battery testing device comprises a power supply module and a short-circuit sensing module. The power supply module is configured to provide a first testing voltage or a first testing current. The short-circuit sensing module, coupled with the power supply module, is configured to integrate the first testing voltage or current during a first testing period, thereby calculating a first output energy provided by the power supply module. The short-circuit sensing module also determines whether the first output energy exceeds a predetermined energy range; when the range is exceeded, the same module generates an error signal. Wherein the short-circuit sensing module generates an error count by calculating during a second testing period the number of times the short-circuit sensing module generates the error signal.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: October 26, 2021
    Assignee: CHROMA ATE INC.
    Inventors: Shuo-Chieh Chang, Che-Wei Wu, Ta-Cheng Lin, Ming-Ying Tsou
  • Patent number: 10803277
    Abstract: A fingerprint sensing circuit and a fingerprint sensing apparatus are provided. The fingerprint sensing circuit includes a sensing electrode; a first converting circuit connected to the sensing electrode and configured to convert a coupling capacitance sensed by the sensing electrode into a drive voltage, where the drive voltage is equal to a sum of a voltage variation converted from the coupling capacitance and a reference voltage; and a second converting circuit configured to generate a sensing current based on the drive voltage, and send the sensing current to a fingerprint signal processor, where the sensing current is equal to a product of a transconductance gain of the second converting circuit and the voltage variation, and the fingerprint signal processor performs fingerprint sensing based on the sensing current. With the fingerprint sensing circuit and the fingerprint sensing apparatus, the detection accuracy can be improved.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: October 13, 2020
    Assignee: FOCALTECH ELECTRONICS, LTD.
    Inventor: Che-Wei Wu
  • Publication number: 20200300921
    Abstract: Herein disclosed is a device for testing batteries as subjects and a method thereof. The battery testing device comprises a power supply module and a short-circuit sensing module. The power supply module is configured to provide a first testing voltage or a first testing current. The short-circuit sensing module, coupled with the power supply module, is configured to integrate the first testing voltage or current during a first testing period, thereby calculating a first output energy provided by the power supply module. The short-circuit sensing module also determines whether the first output energy exceeds a predetermined energy range; when the range is exceeded, the same module generates an error signal. Wherein the short-circuit sensing module generates an error count by calculating during a second testing period the number of times the short-circuit sensing module generates the error signal.
    Type: Application
    Filed: March 16, 2020
    Publication date: September 24, 2020
    Inventors: Shuo-Chieh CHANG, Che-Wei WU, Ta-Cheng LIN, Ming-Ying TSOU
  • Patent number: 10702245
    Abstract: The present invention provides a method of detecting microbubbles in a vessel of an affected part, comprising aggregates the microbubbles, acquiring phase-contrast magnetic resonance images and analyzing the phase-contrast magnetic resonance images. Thus, we can detect or monitor the size and location of the microbubbles in vessels of any part of body.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: July 7, 2020
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Hsu-Hsia Peng, Che-Wei Wu
  • Publication number: 20190012503
    Abstract: A fingerprint sensing circuit and a fingerprint sensing apparatus are provided. The fingerprint sensing circuit includes a sensing electrode; a first converting circuit connected to the sensing electrode and configured to convert a coupling capacitance sensed by the sensing electrode into a drive voltage, where the drive voltage is equal to a sum of a voltage variation converted from the coupling capacitance and a reference voltage; and a second converting circuit configured to generate a sensing current based on the drive voltage, and send the sensing current to a fingerprint signal processor, where the sensing current is equal to a product of a transconductance gain of the second converting circuit and the voltage variation, and the fingerprint signal processor performs fingerprint sensing based on the sensing current. With the fingerprint sensing circuit and the fingerprint sensing apparatus, the detection accuracy can be improved.
    Type: Application
    Filed: January 12, 2018
    Publication date: January 10, 2019
    Applicant: FOCALTECH ELECTRONICS, LTD.
    Inventor: Che-Wei WU
  • Publication number: 20180317886
    Abstract: The present invention provides a method of detecting microbubbles in a vessel of an affected part, comprising aggregating the microbubbles, acquiring phase-contrast magnetic resonance images and analyzing the phase-contrast magnetic resonance images. Thus, the present invention can detect or monitor the size and location of MBs in vessels of any part of body.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 8, 2018
    Inventors: HSU-HSIA PENG, CHE-WEI WU
  • Patent number: 9690365
    Abstract: A processing device performs dual-rail power equalization for its memory cell array and logic circuitry. The memory cell array is coupled to a first power rail through a first switch to receive a first voltage level. The logic circuitry is coupled to a second power rail through a second switch to receive a second voltage level that is different from the first voltage level. The processing device also includes a power switch coupled to at least the second power rail and operative to be enabled to equalize voltage supplied to the memory cell array and the logic circuitry.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: June 27, 2017
    Assignee: MediaTek, Inc.
    Inventors: Hugh Thomas Mair, Yi-Te Chiu, Che-Wei Wu, Lee-Kee Yong, Chia-Wei Wang, Cheng-Hsing Chien, Uming Ko
  • Publication number: 20160320821
    Abstract: A processing device performs dual-rail power equalization for its memory cell array and logic circuitry. The memory cell array is coupled to a first power rail through a first switch to receive a first voltage level. The logic circuitry is coupled to a second power rail through a second switch to receive a second voltage level that is different from the first voltage level. The processing device also includes a power switch coupled to at least the second power rail and operative to be enabled to equalize voltage supplied to the memory cell array and the logic circuitry.
    Type: Application
    Filed: April 26, 2016
    Publication date: November 3, 2016
    Inventors: Hugh Thomas Mair, Yi-Te Chiu, Che-Wei Wu, Lee-Kee Yong, Chia-Wei Wang, Cheng-Hsing Chien, Uming Ko
  • Patent number: 8779850
    Abstract: A bootstrap circuit includes an input terminal, an inverting input terminal, an output terminal, an inverting output terminal, a first sub-bootstrap circuit, a second sub-bootstrap circuit, and a charging path providing circuit. The first sub-bootstrap circuit includes a first bootstrap capacitor, a first charging path, a first discharging path, and a first high voltage providing path. The charging path providing circuit includes a third charging path. In response to a high voltage level inputted into the input terminal, the first charging path and the third charging path are turned on, the first bootstrap capacitor is charged to a capacitor voltage, and the first discharging path is turned on to discharge the output terminal. In response to a low voltage level inputted into the input terminal, a first superimposed voltage including the high voltage level and the capacitor voltage is provided to the output terminal.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: July 15, 2014
    Assignee: Orise Technology Co., Ltd.
    Inventor: Che-Wei Wu
  • Patent number: 8653877
    Abstract: A current mirror modified level shifter includes a pair of PMOS including a PMOS (MPL) and a PMOS (MPR), wherein a Vot node connected to a drain of the PMOS (MPR); a pair of NMOS including NMOS (MNL) and a NMOS (MNR), wherein sources of the PMOS (MPL) and the PMOS (MPR) are coupled to a high voltage (HV), respectively; gates of the PMOS (MPL) and the PMOS (MPR) coupled together through a Vm node which located between the gates of the PMOS (MPL) and the PMOS (MPR); and a suspended PMOS (MPM) coupled to drain of the PMOS (MPL), the Vm node being coupled to a Va node between drain of the suspend PMOS (MPM) and drain of the NMOS (MNL).
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: February 18, 2014
    Assignee: National Tsing Hua University
    Inventors: Che-Wei Wu, Meng-Fan Chang