Abstract: A switching converter for converting an input voltage to an output voltage includes: a power stage circuit which includes a high-side switch, a low-side switch and an auxiliary transistor; and a conversion control circuit for controlling the high-side switch, the low-side switch and the auxiliary transistor. In a switching conversion mode, the conversion control circuit controls the auxiliary transistor to be ON, and controls the high-side switch and the low-side switch to switch an inductor to convert the input voltage to the output voltage. In a pre-charging mode, the conversion control circuit controls the low-side switch to be OFF, and controls the auxiliary transistor to pre-charge the output voltage. In a linear conversion mode, the conversion control circuit controls the low-side switch to be OFF, and controls the auxiliary transistor to linearly convert the input voltage to the output voltage according to a feedback signal related to the output voltage.

Abstract: A switching converter for converting an input voltage to an output voltage includes: a power stage circuit which includes a high-side switch, a low-side switch and an auxiliary transistor; and a conversion control circuit for controlling the high-side switch, the low-side switch and the auxiliary transistor. In a switching conversion mode, the conversion control circuit controls the auxiliary transistor to be ON, and controls the high-side switch and the low-side switch to switch an inductor to convert the input voltage to the output voltage. In a pre-charging mode, the conversion control circuit controls the low-side switch to be OFF, and controls the auxiliary transistor to pre-charge the output voltage. In a linear conversion mode, the conversion control circuit controls the low-side switch to be OFF, and controls the auxiliary transistor to linearly convert the input voltage to the output voltage according to a feedback signal related to the output voltage.

Abstract: A thin-film deposition system includes a top plate positioned above a wafer and configured to generate a plasma during a thin-film deposition process. The system includes a sensor configured to generate sensor signals indicative of a lifetime of a component of the thin-film deposition system, a characteristic of a thin-film deposited by the thin-film deposition system or a characteristic of a process material that flows into the thin-film deposition system. The system includes a control system configured to adjust a relative location of a top plate of the thin-film deposition system with respect to a location of a wafer in the thin-film deposition system during the thin-film deposition process responsive to the sensor signals.

Abstract: A display device includes a controller, a power management circuit and N display modules. Each of the N display modules includes M driving circuits, and M display arrays respectively connected to the M driving circuits. Each of the M driving circuits is configured to drive a display array connected to the driving circuit, and each of the display arrays includes at least one indicator light. The power management circuit is configured to output a voltage determined by the voltage control signal to the display arrays to supply power to the display array. M driving circuits in each of the display modules are cascaded through serial control lines. The controller is configured to address M driving circuits and read data of M driving circuits through the serial control lines, and send information to the driving circuits through the sharing data line to control the driving circuits and the indicator light.

Abstract: A thin-film deposition system includes a top plate positioned above a wafer and configured to generate a plasma during a thin-film deposition process. The system includes a sensor configured to generate sensor signals indicative of a lifetime of a component of the thin-film deposition system, a characteristic of a thin-film deposited by the thin-film deposition system or a characteristic of a process material that flows into the thin-film deposition system. The system includes a control system configured to adjust a relative location of a top plate of the thin-film deposition system with respect to a location of a wafer in the thin-film deposition system during the thin-film deposition process responsive to the sensor signals.

Abstract: A display device includes a controller, a power management circuit and N display modules. Each of the N display modules includes M driving circuits, and M display arrays respectively connected to the M driving circuits. Each of the M driving circuits is configured to drive a display array connected to the driving circuit, and each of the display arrays includes at least one indicator light. The power management circuit is configured to output a voltage determined by the voltage control signal to the display arrays to supply power to the display array. M driving circuits in each of the display modules are cascaded through serial control lines. The controller is configured to address M driving circuits and read data of M driving circuits through the serial control lines, and send information to the driving circuits through the sharing data line to control the driving circuits and the indicator light.

Abstract: A thin-film deposition system includes a top plate positioned above a wafer and configured to generate a plasma during a thin-film deposition process. The system includes a sensor configured to generate sensor signals indicative of a lifetime of a component of the thin-film deposition system, a characteristic of a thin-film deposited by the thin-film deposition system or a characteristic of a process material that flows into the thin-film deposition system. The system includes a control system configured to adjust a relative location of a top plate of the thin-film deposition system with respect to a location of a wafer in the thin-film deposition system during the thin-film deposition process responsive to the sensor signals.

Abstract: Herein disclosed is a device for testing batteries as subjects and a method thereof. The battery testing device comprises a power supply module and a short-circuit sensing module. The power supply module is configured to provide a first testing voltage or a first testing current. The short-circuit sensing module, coupled with the power supply module, is configured to integrate the first testing voltage or current during a first testing period, thereby calculating a first output energy provided by the power supply module. The short-circuit sensing module also determines whether the first output energy exceeds a predetermined energy range; when the range is exceeded, the same module generates an error signal. Wherein the short-circuit sensing module generates an error count by calculating during a second testing period the number of times the short-circuit sensing module generates the error signal.

Abstract: A fingerprint sensing circuit and a fingerprint sensing apparatus are provided. The fingerprint sensing circuit includes a sensing electrode; a first converting circuit connected to the sensing electrode and configured to convert a coupling capacitance sensed by the sensing electrode into a drive voltage, where the drive voltage is equal to a sum of a voltage variation converted from the coupling capacitance and a reference voltage; and a second converting circuit configured to generate a sensing current based on the drive voltage, and send the sensing current to a fingerprint signal processor, where the sensing current is equal to a product of a transconductance gain of the second converting circuit and the voltage variation, and the fingerprint signal processor performs fingerprint sensing based on the sensing current. With the fingerprint sensing circuit and the fingerprint sensing apparatus, the detection accuracy can be improved.

Abstract: Herein disclosed is a device for testing batteries as subjects and a method thereof. The battery testing device comprises a power supply module and a short-circuit sensing module. The power supply module is configured to provide a first testing voltage or a first testing current. The short-circuit sensing module, coupled with the power supply module, is configured to integrate the first testing voltage or current during a first testing period, thereby calculating a first output energy provided by the power supply module. The short-circuit sensing module also determines whether the first output energy exceeds a predetermined energy range; when the range is exceeded, the same module generates an error signal. Wherein the short-circuit sensing module generates an error count by calculating during a second testing period the number of times the short-circuit sensing module generates the error signal.

Abstract: The present invention provides a method of detecting microbubbles in a vessel of an affected part, comprising aggregates the microbubbles, acquiring phase-contrast magnetic resonance images and analyzing the phase-contrast magnetic resonance images. Thus, we can detect or monitor the size and location of the microbubbles in vessels of any part of body.

Abstract: A fingerprint sensing circuit and a fingerprint sensing apparatus are provided. The fingerprint sensing circuit includes a sensing electrode; a first converting circuit connected to the sensing electrode and configured to convert a coupling capacitance sensed by the sensing electrode into a drive voltage, where the drive voltage is equal to a sum of a voltage variation converted from the coupling capacitance and a reference voltage; and a second converting circuit configured to generate a sensing current based on the drive voltage, and send the sensing current to a fingerprint signal processor, where the sensing current is equal to a product of a transconductance gain of the second converting circuit and the voltage variation, and the fingerprint signal processor performs fingerprint sensing based on the sensing current. With the fingerprint sensing circuit and the fingerprint sensing apparatus, the detection accuracy can be improved.

Abstract: The present invention provides a method of detecting microbubbles in a vessel of an affected part, comprising aggregating the microbubbles, acquiring phase-contrast magnetic resonance images and analyzing the phase-contrast magnetic resonance images. Thus, the present invention can detect or monitor the size and location of MBs in vessels of any part of body.

Abstract: A processing device performs dual-rail power equalization for its memory cell array and logic circuitry. The memory cell array is coupled to a first power rail through a first switch to receive a first voltage level. The logic circuitry is coupled to a second power rail through a second switch to receive a second voltage level that is different from the first voltage level. The processing device also includes a power switch coupled to at least the second power rail and operative to be enabled to equalize voltage supplied to the memory cell array and the logic circuitry.

Abstract: A processing device performs dual-rail power equalization for its memory cell array and logic circuitry. The memory cell array is coupled to a first power rail through a first switch to receive a first voltage level. The logic circuitry is coupled to a second power rail through a second switch to receive a second voltage level that is different from the first voltage level. The processing device also includes a power switch coupled to at least the second power rail and operative to be enabled to equalize voltage supplied to the memory cell array and the logic circuitry.

Abstract: A bootstrap circuit includes an input terminal, an inverting input terminal, an output terminal, an inverting output terminal, a first sub-bootstrap circuit, a second sub-bootstrap circuit, and a charging path providing circuit. The first sub-bootstrap circuit includes a first bootstrap capacitor, a first charging path, a first discharging path, and a first high voltage providing path. The charging path providing circuit includes a third charging path. In response to a high voltage level inputted into the input terminal, the first charging path and the third charging path are turned on, the first bootstrap capacitor is charged to a capacitor voltage, and the first discharging path is turned on to discharge the output terminal. In response to a low voltage level inputted into the input terminal, a first superimposed voltage including the high voltage level and the capacitor voltage is provided to the output terminal.

Abstract: A current mirror modified level shifter includes a pair of PMOS including a PMOS (MPL) and a PMOS (MPR), wherein a Vot node connected to a drain of the PMOS (MPR); a pair of NMOS including NMOS (MNL) and a NMOS (MNR), wherein sources of the PMOS (MPL) and the PMOS (MPR) are coupled to a high voltage (HV), respectively; gates of the PMOS (MPL) and the PMOS (MPR) coupled together through a Vm node which located between the gates of the PMOS (MPL) and the PMOS (MPR); and a suspended PMOS (MPM) coupled to drain of the PMOS (MPL), the Vm node being coupled to a Va node between drain of the suspend PMOS (MPM) and drain of the NMOS (MNL).

Abstract: A bootstrap circuit includes an input terminal, an inverting input terminal, an output terminal, an inverting output terminal, a first sub-bootstrap circuit, a second sub-bootstrap circuit, and a charging path providing circuit. The first sub-bootstrap circuit includes a first bootstrap capacitor, a first charging path, a first discharging path, and a first high voltage providing path. The charging path providing circuit includes a third charging path. In response to a high voltage level inputted into the input terminal, the first charging path and the third charging path are turned on, the first bootstrap capacitor is charged to a capacitor voltage, and the first discharging path is turned on to discharge the output terminal. In response to a low voltage level inputted into the input terminal, a first superimposed voltage including the high voltage level and the capacitor voltage is provided to the output terminal.

Abstract: A current mirror modified level shifter includes a pair of PMOS including a PMOS (MPL) and a PMOS (MPR), wherein a Vot node connected to a drain of the PMOS (MPR); a pair of NMOS including NMOS (MNL) and a NMOS (MNR), wherein sources of the PMOS (MPL) and the PMOS (MPR) are coupled to a high voltage (HV), respectively; gates of the PMOS (MPL) and the PMOS (MPR) coupled together through a Vm node which located between the gates of the PMOS (MPL) and the PMOS (MPR); and a suspended PMOS (MPM) coupled to drain of the PMOS (MPL), the Vm node being coupled to a Va node between drain of the suspend PMOS (MPM) and drain of the NMOS (MNL).

Abstract: A bulk-driven current-sense amplifier and an amplifier operating method are disclosed. The bulk-driven current-sense amplifier includes a differential amplifier, a first driver, and a second driver. The first driver is coupled to the differential amplifier, and a first node is formed at a connectivity segment of the first driver. The second drive is coupled to the differential amplifier, and a second node is formed at a connectivity segment of the second driver. When a first switch of the first driver and a second switch of the second driver are turned on, the differential amplifier charges the first node and the second node. When the charging is completed, the first node and the second node respectively have a different stabilized potential according to currents separately flowing through a first memory unit of the first driver and a second memory unit of the second drive, and the differential amplifier generates a voltage.